Add register-only cross-lane reduction for attention#2359

Merged

stefankoncarevic merged 12 commits into

ROCm:developfrom

stefankoncarevic:blockwise-reduce-crosslane

May 28, 2026

Commits on May 28, 2026

Add permlanex16_var cross-lane reduction for partialR=2 on wave32
stefankoncarevic
committed
Split permlane reduction into SerialPermlane and PR2-Permlane paths for Navi4x
stefankoncarevic
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Add permlane fast-paths with LDS-skip for NR-Large/NR-Small reductions
stefankoncarevic
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Relax LDS-skip to multi-wave blocks for attention permlane reduction paths
stefankoncarevic
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Add ds_swizzle+ds_bpermute cross-lane reduction for CDNA wave64
stefankoncarevic
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Register-only cross-lane reduction: widen sub-32-bit types, add
stefankoncarevic
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Replace ROCDL::DsSwizzleOp with amdgpu::SwizzleBitModeOp in cross-lane reductions
stefankoncarevic
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Cherry-pick upstream LLVM PR #199501: add permlane16.var and permlanex16.var ops
stefankoncarevic
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Address review findings: harden cross-lane fast-path gates, fix formatting
stefankoncarevic
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Add cross-lane reduction tests and DPP validation assertions
stefankoncarevic
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Fix DPP correctness comments and remove redundant assertions
stefankoncarevic
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Merge branch 'develop' into blockwise-reduce-crosslane
umangyadav
authored