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Merged
Rbb666 merged 2 commits into from
May 14, 2026
Merged

Uart #69

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6b81a2a
添加uart1支持+支持动态修改波特率
Rbb666 May 14, 2026
569f15f
硬件i2c注册修改为静态分配
Rbb666 May 14, 2026
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2 changes: 1 addition & 1 deletion libraries/HAL_Drivers/SConscript
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
src += ['drv_soft_i2c.c']

if GetDepend(['RT_USING_I2C']):
if GetDepend('BSP_USING_HW_I2C0') or GetDepend('BSP_USING_HW_I2C4') or GetDepend('BSP_USING_HW_I2C6'):
if GetDepend('BSP_USING_HW_I2C0') or GetDepend('BSP_USING_HW_I2C3') or GetDepend('BSP_USING_HW_I2C4') or GetDepend('BSP_USING_HW_I2C5') or GetDepend('BSP_USING_HW_I2C6') or GetDepend('BSP_USING_HW_I2C8'):
src += ['drv_i2c.c']

if GetDepend(['BSP_USING_SDIO1']):
Expand Down
129 changes: 102 additions & 27 deletions libraries/HAL_Drivers/drv_i2c.c
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Original file line number Diff line number Diff line change
Expand Up @@ -11,9 +11,24 @@
#include "board.h"

#if defined(RT_USING_I2C)
#if defined(BSP_USING_HW_I2C0) || defined(BSP_USING_HW_I2C3) || defined(BSP_USING_HW_I2C4) || defined(BSP_USING_HW_I2C6)
#include <rtdevice.h>

#include "cy_scb_i2c.h"
#include "mtb_hal_i2c.h"

#ifdef BSP_USING_HW_I2C0
extern const cy_stc_scb_i2c_config_t CYBSP_I2C_CONTROLLER_config;
extern const mtb_hal_i2c_configurator_t CYBSP_I2C_CONTROLLER_hal_config;
#endif
#ifdef BSP_USING_HW_I2C5
extern const cy_stc_scb_i2c_config_t CYBSP_I2C5_CONTROLLER_config;
extern const mtb_hal_i2c_configurator_t CYBSP_I2C5_CONTROLLER_hal_config;
#endif
#ifdef BSP_USING_HW_I2C8
extern const cy_stc_scb_i2c_config_t scb_8_config;
extern const mtb_hal_i2c_configurator_t scb_8_hal_config;
#endif

#ifndef I2C0_CONFIG
#define I2C0_CONFIG \
{ \
Expand All @@ -24,20 +39,68 @@
}
#endif /* I2C0_CONFIG */

#endif
#ifndef I2C3_CONFIG
#define I2C3_CONFIG \
{ \
.name = "i2c3", \
.base = SCB3, \
.cy_stc_scb_i2c_config = RT_NULL, \
.mtb_hal_i2c_configurator = RT_NULL, \
}
#endif /* I2C3_CONFIG */

#ifndef I2C4_CONFIG
#define I2C4_CONFIG \
{ \
.name = "i2c4", \
.base = SCB4, \
.cy_stc_scb_i2c_config = RT_NULL, \
.mtb_hal_i2c_configurator = RT_NULL, \
}
#endif /* I2C4_CONFIG */

#ifndef I2C5_CONFIG
#define I2C5_CONFIG \
{ \
.name = "i2c5", \
.base = SCB5, \
.cy_stc_scb_i2c_config = &CYBSP_I2C5_CONTROLLER_config, \
.mtb_hal_i2c_configurator = &CYBSP_I2C5_CONTROLLER_hal_config, \
}
#endif /* I2C5_CONFIG */

#ifndef I2C6_CONFIG
#define I2C6_CONFIG \
{ \
.name = "i2c6", \
.base = SCB6, \
.cy_stc_scb_i2c_config = RT_NULL, \
.mtb_hal_i2c_configurator = RT_NULL, \
}
#endif /* I2C6_CONFIG */

#ifndef I2C8_CONFIG
#define I2C8_CONFIG \
{ \
.name = "i2c8", \
.base = SCB8, \
.cy_stc_scb_i2c_config = &scb_8_config, \
.mtb_hal_i2c_configurator = &scb_8_hal_config, \
}
#endif /* I2C8_CONFIG */

struct ifx_i2c
{
mtb_hal_i2c_t *mtb_hal_i2c;
char *name;
const char *name;
CySCB_Type *base;
const cy_stc_scb_i2c_config_t *cy_stc_scb_i2c_config;
const mtb_hal_i2c_configurator_t *mtb_hal_i2c_configurator;
cy_stc_scb_i2c_context_t *context;
mtb_hal_i2c_t hal_obj;
cy_stc_scb_i2c_context_t context;
struct rt_i2c_bus_device i2c_bus;
};

static struct ifx_i2c ifx_i2c[] =
static struct ifx_i2c i2c_objs[] =
{
#ifdef BSP_USING_HW_I2C0
I2C0_CONFIG,
Expand All @@ -51,16 +114,24 @@ static struct ifx_i2c ifx_i2c[] =
I2C4_CONFIG,
#endif

#ifdef BSP_USING_HW_I2C5
I2C5_CONFIG,
#endif

#ifdef BSP_USING_HW_I2C6
I2C6_CONFIG,
#endif

#ifdef BSP_USING_HW_I2C8
I2C8_CONFIG,
#endif
};

static struct ifx_i2c i2c_objs[sizeof(ifx_i2c) / sizeof(struct ifx_i2c)] = {0};
#define I2C_BUS_NUM (sizeof(i2c_objs) / sizeof(i2c_objs[0]))

static int ifx_i2c_read(struct ifx_i2c *hi2c, rt_uint16_t slave_address, rt_uint8_t *p_buffer, rt_uint16_t data_byte)
{
if (mtb_hal_i2c_controller_read(hi2c->mtb_hal_i2c, slave_address, p_buffer, data_byte, 10, true) != RT_EOK)
if (mtb_hal_i2c_controller_read(&hi2c->hal_obj, slave_address, p_buffer, data_byte, 10, true) != CY_RSLT_SUCCESS)
{
return -RT_ERROR;
}
Expand All @@ -70,7 +141,7 @@ static int ifx_i2c_read(struct ifx_i2c *hi2c, rt_uint16_t slave_address, rt_uint

static int ifx_i2c_write(struct ifx_i2c *hi2c, uint16_t slave_address, uint8_t *p_buffer, uint16_t data_byte)
{
if (mtb_hal_i2c_controller_write(hi2c->mtb_hal_i2c, slave_address, p_buffer, data_byte, 10, true) != RT_EOK)
if (mtb_hal_i2c_controller_write(&hi2c->hal_obj, slave_address, p_buffer, data_byte, 10, true) != CY_RSLT_SUCCESS)
{
return -RT_ERROR;
}
Expand Down Expand Up @@ -121,33 +192,35 @@ static const struct rt_i2c_bus_device_ops i2c_ops =
RT_NULL
};

void HAL_I2C_Init(struct ifx_i2c *obj)
static rt_err_t ifx_i2c_hw_init(struct ifx_i2c *obj)
{
RT_ASSERT(obj != RT_NULL);
RT_ASSERT(obj->mtb_hal_i2c != RT_NULL);
RT_ASSERT(obj->mtb_hal_i2c_configurator != RT_NULL);
RT_ASSERT(obj->context != RT_NULL);

if ((obj->mtb_hal_i2c_configurator == RT_NULL) || (obj->cy_stc_scb_i2c_config == RT_NULL))
{
rt_kprintf("I2C %s config is missing, skip register\n", obj->name);
return -RT_ERROR;
}

cy_rslt_t rslt;
cy_en_scb_i2c_status_t result;

result = Cy_SCB_I2C_Init(obj->base, obj->cy_stc_scb_i2c_config, obj->context);
result = Cy_SCB_I2C_Init(obj->base, obj->cy_stc_scb_i2c_config, &obj->context);
if (result != CY_SCB_I2C_SUCCESS)
{
rt_kprintf("Cy_SCB_I2C_Init failed for %s, code: 0x%08x\n", obj->name, result);
return;
return -RT_ERROR;
}

Cy_SCB_I2C_Enable(obj->base);

rslt = mtb_hal_i2c_setup(obj->mtb_hal_i2c, obj->mtb_hal_i2c_configurator, obj->context, NULL);
rslt = mtb_hal_i2c_setup(&obj->hal_obj, obj->mtb_hal_i2c_configurator, &obj->context, NULL);
if (rslt != CY_RSLT_SUCCESS)
{
rt_kprintf("I2C setup failed for %s, code: 0x%08x\n", obj->name, rslt);
return;
return -RT_ERROR;
}

// Define the I2C controller dev_config_struct structure
mtb_hal_i2c_cfg_t i2c_controller_config =
{
MTB_HAL_I2C_MODE_CONTROLLER,
Expand All @@ -157,28 +230,30 @@ void HAL_I2C_Init(struct ifx_i2c *obj)
false,
};

rslt = mtb_hal_i2c_configure(obj->mtb_hal_i2c, &i2c_controller_config);
rslt = mtb_hal_i2c_configure(&obj->hal_obj, &i2c_controller_config);
if (rslt != CY_RSLT_SUCCESS)
{
rt_kprintf("I2C configure failed for %s, code: 0x%08x\n", obj->name, rslt);
return;
return -RT_ERROR;
}

return RT_EOK;
}

int rt_hw_i2c_init(void)
{
rt_err_t result = RT_EOK;
size_t i2c_num = sizeof(ifx_i2c) / sizeof(struct ifx_i2c);
size_t i2c_num = I2C_BUS_NUM;

for (size_t i = 0; i < i2c_num; i++)
{
i2c_objs[i] = ifx_i2c[i];
i2c_objs[i].i2c_bus.ops = &i2c_ops;
i2c_objs[i].context = rt_malloc(sizeof(cy_stc_scb_i2c_context_t));
RT_ASSERT(i2c_objs[i].context != RT_NULL);
i2c_objs[i].mtb_hal_i2c = rt_malloc(sizeof(mtb_hal_i2c_t));
RT_ASSERT(i2c_objs[i].mtb_hal_i2c != RT_NULL);
HAL_I2C_Init(&i2c_objs[i]);

if (ifx_i2c_hw_init(&i2c_objs[i]) != RT_EOK)
{
continue;
}

result = rt_i2c_bus_device_register(&i2c_objs[i].i2c_bus, i2c_objs[i].name);
RT_ASSERT(result == RT_EOK);
}
Expand Down
48 changes: 39 additions & 9 deletions libraries/HAL_Drivers/drv_uart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,11 @@ static struct ifx_uart_config uart_config[] =
#endif
};

static struct ifx_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
#define UART_OBJ_NUM (sizeof(uart_config) / sizeof(uart_config[0]))

static struct ifx_uart uart_obj[UART_OBJ_NUM] = {0};
static mtb_hal_uart_t uart_hal_obj[UART_OBJ_NUM];
static cy_stc_scb_uart_context_t uart_hal_context[UART_OBJ_NUM];

static void uart_isr(struct rt_serial_device *serial)
{
Expand Down Expand Up @@ -176,6 +180,8 @@ void uart6_isr_callback(void)
/*
* UARTHS interface
*/
static rt_err_t ifx_control(struct rt_serial_device *serial, int cmd, void *arg);

static rt_err_t ifx_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
RT_ASSERT(serial != RT_NULL);
Expand All @@ -198,6 +204,11 @@ static rt_err_t ifx_configure(struct rt_serial_device *serial, struct serial_con

RT_ASSERT(result == RT_EOK);

if (serial->parent.open_flag & RT_DEVICE_FLAG_INT_RX)
{
ifx_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)RT_DEVICE_FLAG_INT_RX);
}

return RT_EOK;
}

Expand All @@ -207,10 +218,13 @@ static rt_err_t ifx_control(struct rt_serial_device *serial, int cmd, void *arg)
struct ifx_uart *uart = (struct ifx_uart *)serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);

(void)arg;

switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:

uart->config->usart_x->INTR_RX_MASK &= ~SCB_INTR_RX_MASK_NOT_EMPTY_Msk;
NVIC_DisableIRQ(uart->config->intrSrc);
break;

case RT_DEVICE_CTRL_SET_INT:
Expand All @@ -223,6 +237,25 @@ static rt_err_t ifx_control(struct rt_serial_device *serial, int cmd, void *arg)
/* Enable the interrupt */
NVIC_EnableIRQ(uart->config->intrSrc);
break;

case RT_DEVICE_CTRL_SUSPEND:
if (serial->parent.open_flag & RT_DEVICE_FLAG_INT_RX)
{
uart->config->usart_x->INTR_RX_MASK &= ~SCB_INTR_RX_MASK_NOT_EMPTY_Msk;
NVIC_DisableIRQ(uart->config->intrSrc);
}
break;

case RT_DEVICE_CTRL_RESUME:
if (serial->parent.open_flag & RT_DEVICE_FLAG_INT_RX)
{
uart->config->usart_x->INTR_RX_MASK = SCB_INTR_RX_MASK_NOT_EMPTY_Msk;
NVIC_EnableIRQ(uart->config->intrSrc);
}
break;

default:
break;
}

return (RT_EOK);
Expand Down Expand Up @@ -280,22 +313,19 @@ const struct rt_uart_ops _uart_ops =

void rt_hw_uart_init(void)
{
int index;

rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ifx_uart);
rt_size_t index;
struct serial_configure serial_config = RT_SERIAL_CONFIG_DEFAULT;
rt_err_t result = 0;

for (index = 0; index < obj_num; index++)
for (index = 0; index < UART_OBJ_NUM; index++)
{
uart_obj[index].config = &uart_config[index];
uart_obj[index].serial.ops = &_uart_ops;
uart_obj[index].serial.config = serial_config;

uart_obj[index].config->uart_obj = rt_malloc(sizeof(mtb_hal_uart_t));
uart_obj[index].config->uart_context = rt_malloc(sizeof(cy_stc_scb_uart_context_t));
uart_obj[index].config->uart_obj = &uart_hal_obj[index];
uart_obj[index].config->uart_context = &uart_hal_context[index];

RT_ASSERT(uart_obj[index].config->uart_obj != RT_NULL);
/* register uart device */
result = rt_hw_serial_register(&uart_obj[index].serial,
uart_obj[index].config->name,
Expand Down
9 changes: 6 additions & 3 deletions ...ects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_peripheral_clocks.c
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Original file line number Diff line number Diff line change
Expand Up @@ -33,9 +33,9 @@ void init_cycfg_peripheral_clocks(void)
Cy_SysClk_PeriGroupSetDivider((0 << 8) | 2, 1U);
Cy_SysClk_PeriGroupSetDivider((1 << 8) | 1, 1U);
Cy_SysClk_PeriGroupSetDivider((1 << 8) | 3, 3U);
Cy_SysClk_PeriPclkDisableDivider((en_clk_dst_t)CYBSP_EZ_I2C_TARGET_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U);
Cy_SysClk_PeriPclkSetDivider((en_clk_dst_t)CYBSP_EZ_I2C_TARGET_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U, 86U);
Cy_SysClk_PeriPclkEnableDivider((en_clk_dst_t)CYBSP_EZ_I2C_TARGET_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U);
Cy_SysClk_PeriPclkDisableDivider((en_clk_dst_t)CYBSP_UART5_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U);
Cy_SysClk_PeriPclkSetDivider((en_clk_dst_t)CYBSP_UART5_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U, 86U);
Cy_SysClk_PeriPclkEnableDivider((en_clk_dst_t)CYBSP_UART5_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U);
Cy_SysClk_PeriPclkDisableDivider((en_clk_dst_t)CYBSP_SPI_CONTROLLER_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 1U);
Cy_SysClk_PeriPclkSetDivider((en_clk_dst_t)CYBSP_SPI_CONTROLLER_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 1U, 9U);
Cy_SysClk_PeriPclkEnableDivider((en_clk_dst_t)CYBSP_SPI_CONTROLLER_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 1U);
Expand Down Expand Up @@ -72,6 +72,9 @@ void init_cycfg_peripheral_clocks(void)
Cy_SysClk_PeriPclkDisableDivider((en_clk_dst_t)CYBSP_TRACE_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_16_5_BIT, 0U);
Cy_SysClk_PeriPclkSetFracDivider((en_clk_dst_t)CYBSP_TRACE_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_16_5_BIT, 0U, 0U, 0U);
Cy_SysClk_PeriPclkEnableDivider((en_clk_dst_t)CYBSP_TRACE_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_16_5_BIT, 0U);
Cy_SysClk_PeriPclkDisableDivider((en_clk_dst_t)PERI_0_GROUP_8_DIV_16_0_GRP_NUM, CY_SYSCLK_DIV_16_BIT, 0U);
Cy_SysClk_PeriPclkSetDivider((en_clk_dst_t)PERI_0_GROUP_8_DIV_16_0_GRP_NUM, CY_SYSCLK_DIV_16_BIT, 0U, 173U);
Cy_SysClk_PeriPclkEnableDivider((en_clk_dst_t)PERI_0_GROUP_8_DIV_16_0_GRP_NUM, CY_SYSCLK_DIV_16_BIT, 0U);
Cy_SysClk_PeriPclkDisableDivider((en_clk_dst_t)CYBSP_I3C_CONTROLLER_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U);
Cy_SysClk_PeriPclkSetDivider((en_clk_dst_t)CYBSP_I3C_CONTROLLER_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U, 7U);
Cy_SysClk_PeriPclkEnableDivider((en_clk_dst_t)CYBSP_I3C_CONTROLLER_CLK_DIV_GRP_NUM, CY_SYSCLK_DIV_8_BIT, 0U);
Expand Down
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