diff --git "a/docs/\345\244\226\350\256\276\346\213\223\345\261\225\351\205\215\347\275\256\346\211\213\345\206\214.pdf" "b/docs/\345\244\226\350\256\276\346\213\223\345\261\225\351\205\215\347\275\256\346\211\213\345\206\214.pdf"
index ffdc1c3e..de8c8732 100644
Binary files "a/docs/\345\244\226\350\256\276\346\213\223\345\261\225\351\205\215\347\275\256\346\211\213\345\206\214.pdf" and "b/docs/\345\244\226\350\256\276\346\213\223\345\261\225\351\205\215\347\275\256\346\211\213\345\206\214.pdf" differ
diff --git a/libraries/HAL_Drivers/drv_adc.c b/libraries/HAL_Drivers/drv_adc.c
index 539294ae..d3d12e62 100644
--- a/libraries/HAL_Drivers/drv_adc.c
+++ b/libraries/HAL_Drivers/drv_adc.c
@@ -11,27 +11,19 @@
 #include <rtthread.h>
 #include "drv_adc.h"
 #include "board.h"
-#include "mtb_hal_adc.h"
+#include "cycfg_peripherals.h"
 
-#if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2)
+#if defined(BSP_USING_ADC1)
 
 //#define DRV_DEBUG
 #define LOG_TAG             "drv.adc"
 #include <drv_log.h>
 
-#ifdef SOC_SERIES_IFX_PSOCE84
-    #define VPLUS_CHANNEL_0     (P15_5)
-    #define SAR_ADC_INDEX               (0U)
-    #define SAR_ADC_SEQENCER            (0U)
-    #define SAR_ADC_CHANNEL             (0U)
-    #define SAR_ADC_VREF_MV             (1800U)
-#endif
-
 struct ifx_adc
 {
     struct rt_adc_device ifx_adc_device;
-    mtb_hal_adc_channel_t *adc_ch;
-    char *name;
+    const struct ifx_sar_adc_config *cfg;
+    const char *name;
 };
 
 static struct ifx_adc ifx_adc_obj[] =
@@ -41,16 +33,112 @@ static struct ifx_adc ifx_adc_obj[] =
 #endif
 };
 
-static rt_err_t ifx_adc_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
+static rt_bool_t autonomous_initialized = RT_FALSE;
+
+static uint8_t ifx_resolve_phy_channel(const struct ifx_sar_adc_config *cfg, uint8_t logical_channel)
+{
+#if defined(CYBSP_SAR_ADC_ENABLED)
+    uint8_t sar_channel;
+
+    for (sar_channel = 0; sar_channel < 8; sar_channel++)
+    {
+        const cy_stc_autanalog_sar_hs_chan_t *hs_channel = CYBSP_SAR_ADC_sta_hs_cfg.hsGpioChan[sar_channel];
+
+        if (hs_channel == NULL)
+        {
+            continue;
+        }
+
+        switch (logical_channel)
+        {
+        case ADC_CHANNEL0:
+            if (hs_channel->posPin == CY_AUTANALOG_SAR_PIN_GPIO4)
+            {
+                return sar_channel;
+            }
+            break;
+
+        case ADC_CHANNEL1:
+            if (hs_channel->posPin == CY_AUTANALOG_SAR_PIN_GPIO5)
+            {
+                return sar_channel;
+            }
+            break;
+
+        case ADC_CHANNEL2:
+            if (hs_channel->posPin == CY_AUTANALOG_SAR_PIN_GPIO6)
+            {
+                return sar_channel;
+            }
+            break;
+
+        case ADC_CHANNEL3:
+            if (hs_channel->posPin == CY_AUTANALOG_SAR_PIN_GPIO7)
+            {
+                return sar_channel;
+            }
+            break;
+
+        default:
+            break;
+        }
+    }
+#endif
+
+    return cfg->channel_map[logical_channel];
+}
+
+static rt_err_t ifx_autonomous_analog_init_once(void)
 {
     cy_rslt_t result = CY_RSLT_SUCCESS;
+
+    if (autonomous_initialized)
+    {
+        return RT_EOK;
+    }
+
     result = Cy_AutAnalog_Init(&autonomous_analog_init);
-    if (CY_AUTANALOG_SUCCESS != result)
+    if (result != CY_AUTANALOG_SUCCESS)
     {
-        rt_kprintf("Autonomous control initialization failed!\n");
+        LOG_E("Autonomous analog init failed");
+        return -RT_ERROR;
     }
+
     Cy_AutAnalog_SetInterruptMask(CY_AUTANALOG_INT_SAR0_RESULT);
     Cy_AutAnalog_StartAutonomousControl();
+    autonomous_initialized = RT_TRUE;
+
+    return RT_EOK;
+}
+
+static rt_err_t ifx_adc_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
+{
+    const struct ifx_sar_adc_config *cfg;
+    uint32_t channel_mask;
+
+    RT_UNUSED(enabled);
+
+    if ((device == RT_NULL) || (channel < 0))
+    {
+        return -RT_EINVAL;
+    }
+
+    cfg = (const struct ifx_sar_adc_config *)device->parent.user_data;
+    channel_mask = (uint32_t)(1u << (uint32_t)channel);
+    if ((cfg == RT_NULL) || ((uint32_t)channel >= cfg->max_channels))
+    {
+        return -RT_EINVAL;
+    }
+
+    if ((cfg->channel_mask & channel_mask) == 0u)
+    {
+        return -RT_EINVAL;
+    }
+
+    if (!autonomous_initialized)
+    {
+        return -RT_ERROR;
+    }
 
     return RT_EOK;
 }
@@ -58,25 +146,79 @@ static rt_err_t ifx_adc_enabled(struct rt_adc_device *device, rt_int8_t channel,
 
 static rt_err_t ifx_get_adc_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
 {
-    uint32_t sar_adc_count;
-    uint16_t sar_adc_mv;
-
-    sar_adc_count = Cy_AutAnalog_SAR_ReadResult(SAR_ADC_INDEX,
-                    CY_AUTANALOG_SAR_INPUT_GPIO,
-                    SAR_ADC_CHANNEL);
-
-    sar_adc_mv = Cy_AutAnalog_SAR_CountsTo_mVolts(SAR_ADC_INDEX, false,
-                 SAR_ADC_SEQENCER,
-                 CY_AUTANALOG_SAR_INPUT_GPIO,
-                 SAR_ADC_CHANNEL,
-                 SAR_ADC_VREF_MV,
+    const struct ifx_sar_adc_config *cfg;
+    int32_t sar_adc_count;
+    int32_t sar_adc_mv;
+    uint8_t phy_channel;
+    uint32_t channel_mask;
+
+    if ((device == RT_NULL) || (value == RT_NULL) || (channel < 0))
+    {
+        return -RT_EINVAL;
+    }
+
+    cfg = (const struct ifx_sar_adc_config *)device->parent.user_data;
+    channel_mask = (uint32_t)(1u << (uint32_t)channel);
+    if ((cfg == RT_NULL) || ((uint32_t)channel >= cfg->max_channels))
+    {
+        return -RT_EINVAL;
+    }
+
+    if ((cfg->channel_mask & channel_mask) == 0u)
+    {
+        return -RT_EINVAL;
+    }
+
+    phy_channel = ifx_resolve_phy_channel(cfg, (uint8_t)channel);
+    if ((phy_channel == IFX_ADC_PHY_INVALID) || (phy_channel >= 8))
+    {
+        return -RT_EINVAL;
+    }
+
+    /* Force one fresh conversion result to avoid stale data. */
+    {
+        uint8_t ch_mask = (uint8_t)(1u << phy_channel);
+        uint32_t timeout = 100000U;
+
+        Cy_AutAnalog_SAR_ClearHSchanResultStatus(cfg->sar_idx, ch_mask);
+        Cy_AutAnalog_StartAutonomousControl();
+
+        while (timeout-- > 0U)
+        {
+            if ((Cy_AutAnalog_SAR_GetHSchanResultStatus(cfg->sar_idx) & ch_mask) != 0U)
+            {
+                break;
+            }
+        }
+
+        if (timeout == 0U)
+        {
+            return -RT_ETIMEOUT;
+        }
+    }
+
+    sar_adc_count = Cy_AutAnalog_SAR_ReadResult(cfg->sar_idx,
+                    cfg->input,
+                    phy_channel);
+
+    sar_adc_mv = Cy_AutAnalog_SAR_CountsTo_mVolts(cfg->sar_idx,
+                 cfg->low_power,
+                 cfg->sequencer,
+                 cfg->input,
+                 phy_channel,
+                 cfg->vref_mv,
                  sar_adc_count);
 
-    *value = sar_adc_mv;
+    if (sar_adc_mv < 0)
+    {
+        sar_adc_mv = 0;
+    }
+
+    *value = (rt_uint32_t)sar_adc_mv;
     return RT_EOK;
 }
 
-static const struct rt_adc_ops at_adc_ops =
+static const struct rt_adc_ops ifx_adc_ops =
 {
     .enabled = ifx_adc_enabled,
     .convert = ifx_get_adc_value,
@@ -84,15 +226,24 @@ static const struct rt_adc_ops at_adc_ops =
 
 static int rt_hw_adc_init(void)
 {
-    int result = RT_EOK;
-    int i = 0;
+    rt_err_t result = RT_EOK;
+    int i;
+
+    result = ifx_autonomous_analog_init_once();
+    if (result != RT_EOK)
+    {
+        return result;
+    }
 
     for (i = 0; i < sizeof(ifx_adc_obj) / sizeof(ifx_adc_obj[0]); i++)
     {
         /* register ADC device */
-        if (rt_hw_adc_register(&ifx_adc_obj[i].ifx_adc_device, ifx_adc_obj[i].name, &at_adc_ops, ifx_adc_obj[i].adc_ch) == RT_EOK)
+        if (rt_hw_adc_register(&ifx_adc_obj[i].ifx_adc_device,
+                               ifx_adc_obj[i].name,
+                               &ifx_adc_ops,
+                               ifx_adc_obj[i].cfg) == RT_EOK)
         {
-            LOG_D("%s register success", at32_adc_obj[i].name);
+            LOG_D("%s register success", ifx_adc_obj[i].name);
         }
         else
         {
@@ -105,4 +256,4 @@ static int rt_hw_adc_init(void)
 }
 INIT_BOARD_EXPORT(rt_hw_adc_init);
 
-#endif /* BSP_USING_ADC */
+#endif /* BSP_USING_ADC1 */
diff --git a/libraries/HAL_Drivers/drv_adc.h b/libraries/HAL_Drivers/drv_adc.h
index 091aebe0..414c3850 100644
--- a/libraries/HAL_Drivers/drv_adc.h
+++ b/libraries/HAL_Drivers/drv_adc.h
@@ -12,7 +12,7 @@
 #define __ADC_CONFIG_H__
 
 #include <rtthread.h>
-#include "mtb_hal_adc.h"
+#include "cy_autanalog.h"
 
 
 
@@ -21,21 +21,98 @@ extern "C"
 {
 #endif
 
-#if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2)
+#if defined(BSP_USING_ADC1)
 
+struct ifx_sar_adc_config
+{
+    uint8_t sar_idx;
+    uint8_t sequencer;
+    uint8_t max_channels;
+    uint32_t channel_mask;
+    bool low_power;
+    cy_en_autanalog_sar_input_t input;
+    uint32_t vref_mv;
+    const uint8_t *channel_map;
+};
+
+#endif
+
+#if defined(BSP_USING_ADC1)
+
+/* Logical ADC channels. */
+#define ADC_CHANNEL0    0
+#define ADC_CHANNEL1    1
+#define ADC_CHANNEL2    2
+#define ADC_CHANNEL3    3
+
+#define IFX_ADC_MAX_CHANNELS    4
+#define IFX_ADC_PHY_INVALID     0xFF
+
+/* Logical channel -> SAR result channel mapping (P15[4]..P15[7]). */
+#if defined(BSP_USING_ADC_CHANNEL0)
+#define ADC_CHANNEL0_GPIO  0
+#define ADC_CHANNEL0_MASK  (1u << ADC_CHANNEL0)
+#else
+#define ADC_CHANNEL0_GPIO  IFX_ADC_PHY_INVALID
+#define ADC_CHANNEL0_MASK  0u
+#endif
+
+#if defined(BSP_USING_ADC_CHANNEL1)
+#define ADC_CHANNEL1_GPIO  1
+#define ADC_CHANNEL1_MASK  (1u << ADC_CHANNEL1)
+#else
+#define ADC_CHANNEL1_GPIO  IFX_ADC_PHY_INVALID
+#define ADC_CHANNEL1_MASK  0u
+#endif
 
-mtb_hal_adc_channel_t adc_chan_obj;
+#if defined(BSP_USING_ADC_CHANNEL2)
+#define ADC_CHANNEL2_GPIO  2
+#define ADC_CHANNEL2_MASK  (1u << ADC_CHANNEL2)
+#else
+#define ADC_CHANNEL2_GPIO  IFX_ADC_PHY_INVALID
+#define ADC_CHANNEL2_MASK  0u
+#endif
 
+#if defined(BSP_USING_ADC_CHANNEL3)
+#define ADC_CHANNEL3_GPIO  3
+#define ADC_CHANNEL3_MASK  (1u << ADC_CHANNEL3)
+#else
+#define ADC_CHANNEL3_GPIO  IFX_ADC_PHY_INVALID
+#define ADC_CHANNEL3_MASK  0u
 #endif
 
+static const uint8_t adc1_channel_map[IFX_ADC_MAX_CHANNELS] =
+{
+    ADC_CHANNEL0_GPIO,
+    ADC_CHANNEL1_GPIO,
+    ADC_CHANNEL2_GPIO,
+    ADC_CHANNEL3_GPIO,
+};
+
+#define ADC1_CHANNEL_MASK (ADC_CHANNEL0_MASK | ADC_CHANNEL1_MASK | ADC_CHANNEL2_MASK | ADC_CHANNEL3_MASK)
+
+static const struct ifx_sar_adc_config adc1_cfg =
+{
+    .sar_idx = 0,
+    .sequencer = 0,
+    .max_channels = IFX_ADC_MAX_CHANNELS,
+    .channel_mask = ADC1_CHANNEL_MASK,
+    .input = CY_AUTANALOG_SAR_INPUT_GPIO,
+    .low_power = false,
+    .vref_mv = 1800,
+    .channel_map = adc1_channel_map,
+};
+
 #ifndef ADC1_CONFIG
 #define ADC1_CONFIG                 \
     {                               \
-        .adc_ch = &adc_chan_obj,    \
+        .cfg = &adc1_cfg,           \
         .name = "adc1",             \
     }
 #endif /* ADC1_CONFIG */
 
+#endif
+
 
 #ifdef __cplusplus
 }
diff --git a/libraries/M33_Config/Kconfig b/libraries/M33_Config/Kconfig
index 2e8d5a72..38b5090f 100644
--- a/libraries/M33_Config/Kconfig
+++ b/libraries/M33_Config/Kconfig
@@ -108,6 +108,24 @@ menu "On-chip Peripheral Drivers"
             config BSP_USING_ADC1
                 bool "Enable ADC1"
                 default n
+
+            if BSP_USING_ADC1
+                config BSP_USING_ADC_CHANNEL0
+                    bool "Enable ADC Channel0 (P15[4])"
+                    default n
+
+                config BSP_USING_ADC_CHANNEL1
+                    bool "Enable ADC Channel1 (P15[5])"
+                    default y
+
+                config BSP_USING_ADC_CHANNEL2
+                    bool "Enable ADC Channel2 (P15[6])"
+                    default n
+
+                config BSP_USING_ADC_CHANNEL3
+                    bool "Enable ADC Channel3 (P15[7])"
+                    default n
+            endif
         endif
 
     menuconfig BSP_USING_CANFD
diff --git a/libraries/M55_Config/Kconfig b/libraries/M55_Config/Kconfig
index 2aca1813..176a2efc 100644
--- a/libraries/M55_Config/Kconfig
+++ b/libraries/M55_Config/Kconfig
@@ -7,7 +7,7 @@ config SOC_SERIES_IFX_PSOCE84
     default y
 
 config KIT_PROCE84_EVK_M55
-    bool 
+    bool
     default y
 
 menu "Onboard Peripheral Drivers"
@@ -106,6 +106,24 @@ menu "On-chip Peripheral Drivers"
             config BSP_USING_ADC1
                 bool "Enable ADC1"
                 default n
+
+            if BSP_USING_ADC1
+                config BSP_USING_ADC_CHANNEL0
+                    bool "Enable ADC Channel0 (P15[4])"
+                    default n
+
+                config BSP_USING_ADC_CHANNEL1
+                    bool "Enable ADC Channel1 (P15[5])"
+                    default y
+
+                config BSP_USING_ADC_CHANNEL2
+                    bool "Enable ADC Channel2 (P15[6])"
+                    default n
+
+                config BSP_USING_ADC_CHANNEL3
+                    bool "Enable ADC Channel3 (P15[7])"
+                    default n
+            endif
         endif
 
     menuconfig BSP_USING_CANFD
@@ -199,7 +217,6 @@ menu "On-chip Peripheral Drivers"
                 default n
         endif
 
-
     menuconfig BSP_USING_TIM
         bool "Enable Timer"
         default n
diff --git a/projects/Edgi_Talk_M33_ADC/.config b/projects/Edgi_Talk_M33_ADC/.config
index 87c99fde..6661fd84 100644
--- a/projects/Edgi_Talk_M33_ADC/.config
+++ b/projects/Edgi_Talk_M33_ADC/.config
@@ -1,4 +1,3 @@
-# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib)
 
 #
 # RT-Thread Kernel
@@ -440,6 +439,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_U8G2 is not set
 # end of u8g2: a monochrome graphic library
 
+# CONFIG_PKG_USING_NES_SIMULATOR is not set
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
@@ -464,6 +464,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # tools packages
 #
+# CONFIG_PKG_USING_VECTOR is not set
 # CONFIG_PKG_USING_CMBACKTRACE is not set
 # CONFIG_PKG_USING_MCOREDUMP is not set
 # CONFIG_PKG_USING_EASYFLASH is not set
@@ -512,6 +513,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RVBACKTRACE is not set
 # CONFIG_PKG_USING_HPATCHLITE is not set
 # CONFIG_PKG_USING_THREAD_METRIC is not set
+# CONFIG_PKG_USING_UORB is not set
+# CONFIG_PKG_USING_RT_TUNNEL is not set
+# CONFIG_PKG_USING_VIRTUAL_TERMINAL is not set
 # end of tools packages
 
 #
@@ -608,6 +612,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_R_RHEALSTONE is not set
 # CONFIG_PKG_USING_HEARTBEAT is not set
 # CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set
+# CONFIG_PKG_USING_CHERRYECAT is not set
 # end of system packages
 
 #
@@ -763,7 +768,24 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set
 # CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_GD32_RISCV_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_GD32VW55X_WIFI is not set
 # end of GD32 Drivers
+
+#
+# HPMicro SDK
+#
+# CONFIG_PKG_USING_HPM_SDK is not set
+# end of HPMicro SDK
+
+#
+# FT32 HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_FT32F0_STD_DRIVER is not set
+# CONFIG_PKG_USING_FT32F0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_FT32F4_STD_DRIVER is not set
+# CONFIG_PKG_USING_FT32F4_CMSIS_DRIVER is not set
+# end of FT32 HAL & SDK Drivers
 # end of HAL & SDK Drivers
 
 #
@@ -809,9 +831,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RT3020 is not set
 # CONFIG_PKG_USING_MLX90632 is not set
 # CONFIG_PKG_USING_MLX90382 is not set
+# CONFIG_PKG_USING_MLX90384 is not set
 # CONFIG_PKG_USING_MLX90393 is not set
 # CONFIG_PKG_USING_MLX90392 is not set
 # CONFIG_PKG_USING_MLX90394 is not set
+# CONFIG_PKG_USING_MLX90396 is not set
 # CONFIG_PKG_USING_MLX90397 is not set
 # CONFIG_PKG_USING_MS5611 is not set
 # CONFIG_PKG_USING_MAX31865 is not set
@@ -936,6 +960,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_IC74HC165 is not set
 # CONFIG_PKG_USING_IST8310 is not set
 # CONFIG_PKG_USING_ST7789_SPI is not set
+# CONFIG_PKG_USING_CAN_UDS is not set
+# CONFIG_PKG_USING_ISOTP_C is not set
+# CONFIG_PKG_USING_IKUNLED is not set
+# CONFIG_PKG_USING_INS5T8025 is not set
+# CONFIG_PKG_USING_ST7305 is not set
 # CONFIG_PKG_USING_SPI_TOOLS is not set
 # end of peripheral libraries and drivers
 
@@ -1293,6 +1322,9 @@ CONFIG_KIT_PROCE84_EVK_M33=y
 #
 CONFIG_BSP_USING_USB_TO_UART=y
 # CONFIG_BSP_USING_AUDIO is not set
+# CONFIG_BSP_USING_AHT20 is not set
+# CONFIG_BSP_USING_USB is not set
+# CONFIG_BSP_USING_LSM6DS3 is not set
 # end of Onboard Peripheral Drivers
 
 #
@@ -1302,22 +1334,28 @@ CONFIG_BSP_USING_GPIO=y
 # CONFIG_BSP_USING_SPI is not set
 CONFIG_BSP_USING_ADC=y
 CONFIG_BSP_USING_ADC1=y
+# CONFIG_BSP_USING_ADC_CHANNEL0 is not set
+CONFIG_BSP_USING_ADC_CHANNEL1=y
+# CONFIG_BSP_USING_ADC_CHANNEL2 is not set
+# CONFIG_BSP_USING_ADC_CHANNEL3 is not set
+# CONFIG_BSP_USING_CANFD is not set
+# CONFIG_BSP_USING_IPC is not set
 # CONFIG_BSP_USING_I2C is not set
 CONFIG_BSP_USING_UART=y
+# CONFIG_BSP_USING_UART1 is not set
 CONFIG_BSP_USING_UART2=y
 CONFIG_BSP_USING_UART5=y
 CONFIG_BSP_USING_RTC=y
 # CONFIG_BSP_USING_HYPERAM is not set
-# CONFIG_BSP_USING_SDCARD is not set
 # CONFIG_BSP_USING_PWM is not set
 # CONFIG_BSP_USING_TIM is not set
 # CONFIG_BSP_USING_WDT is not set
+# CONFIG_BSP_USING_SDIO is not set
 # CONFIG_BSP_USING_LCD is not set
+# CONFIG_BSP_USING_FILESYSTEM is not set
+# CONFIG_USING_LVGL is not set
+# CONFIG_BSP_USING_FREERTOS is not set
 # end of On-chip Peripheral Drivers
-
-#
-# Board extended module Drivers
-#
-# CONFIG_BSP_USING_AHT20 is not set
-# end of Board extended module Drivers
 # end of Hardware Drivers Config
+
+# CONFIG_RT_USING_CHERRYUSB is not set
diff --git a/projects/Edgi_Talk_M33_ADC/applications/main.c b/projects/Edgi_Talk_M33_ADC/applications/main.c
index bee96b35..94628fbb 100644
--- a/projects/Edgi_Talk_M33_ADC/applications/main.c
+++ b/projects/Edgi_Talk_M33_ADC/applications/main.c
@@ -1,17 +1,43 @@
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
+#include "drv_adc.h"
 
 #define ADC_CTRL                  GET_PIN(8, 4)
 #define LED_PIN_B                 GET_PIN(16, 5)
 #define ADC_DEV_NAME              "adc1"
-#define ADC_DEV_CHANNEL           0
+
+#if !defined(BSP_USING_ADC_CHANNEL0) && \
+    !defined(BSP_USING_ADC_CHANNEL1) && \
+    !defined(BSP_USING_ADC_CHANNEL2) && \
+    !defined(BSP_USING_ADC_CHANNEL3)
+    #error "Please enable at least one ADC channel"
+#endif
+
+static const rt_uint8_t adc_channels[] =
+{
+#if defined(BSP_USING_ADC_CHANNEL0)
+    ADC_CHANNEL0,
+#endif
+#if defined(BSP_USING_ADC_CHANNEL1)
+    ADC_CHANNEL1,
+#endif
+#if defined(BSP_USING_ADC_CHANNEL2)
+    ADC_CHANNEL2,
+#endif
+#if defined(BSP_USING_ADC_CHANNEL3)
+    ADC_CHANNEL3,
+#endif
+};
+
+#define ADC_CHANNEL_COUNT (sizeof(adc_channels) / sizeof(adc_channels[0]))
 
 rt_adc_device_t adc_dev;
-rt_uint32_t value, mv, v, mv_frac;
 
 int main(void)
 {
+    rt_size_t i;
+
     rt_kprintf("Hello RT-Thread\r\n");
     rt_kprintf("This core is cortex-m33\n");
     rt_pin_mode(LED_PIN_B, PIN_MODE_OUTPUT);
@@ -25,21 +51,29 @@ int main(void)
         return RT_ERROR;
     }
 
-    rt_adc_enable(adc_dev, ADC_DEV_CHANNEL);
+    for (i = 0; i < ADC_CHANNEL_COUNT; i++)
+    {
+        rt_adc_enable(adc_dev, (rt_int8_t)adc_channels[i]);
+    }
 
     while (1)
     {
+        rt_uint32_t value, mv, v, mv_frac;
+
         rt_pin_write(LED_PIN_B, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED_PIN_B, PIN_LOW);
         rt_thread_mdelay(500);
 
-        value = rt_adc_read(adc_dev, ADC_DEV_CHANNEL);
-        mv = (value * 4200 + 900) / 1800;
-        v = mv / 1000;
-        mv_frac = mv % 1000;
+        for (i = 0; i < ADC_CHANNEL_COUNT; i++)
+        {
+            value = rt_adc_read(adc_dev, (rt_int8_t)adc_channels[i]);
+            mv = (value * 4200 + 900) / 1800;
+            v = mv / 1000;
+            mv_frac = mv % 1000;
 
-        rt_kprintf("Value is: %d.%03d V\n", v, mv_frac);
+            rt_kprintf("CH%d Value is: %d.%03d V\n", adc_channels[i], v, mv_frac);
+        }
     }
     return 0;
 }
diff --git a/projects/Edgi_Talk_M33_ADC/rtconfig.h b/projects/Edgi_Talk_M33_ADC/rtconfig.h
index 0ce8048f..6221d3db 100644
--- a/projects/Edgi_Talk_M33_ADC/rtconfig.h
+++ b/projects/Edgi_Talk_M33_ADC/rtconfig.h
@@ -1,8 +1,6 @@
 #ifndef RT_CONFIG_H__
 #define RT_CONFIG_H__
 
-/* Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) */
-
 /* RT-Thread Kernel */
 
 #define RT_NAME_MAX 8
@@ -258,6 +256,14 @@
 /* GD32 Drivers */
 
 /* end of GD32 Drivers */
+
+/* HPMicro SDK */
+
+/* end of HPMicro SDK */
+
+/* FT32 HAL & SDK Drivers */
+
+/* end of FT32 HAL & SDK Drivers */
 /* end of HAL & SDK Drivers */
 
 /* sensors drivers */
@@ -356,15 +362,12 @@
 #define BSP_USING_GPIO
 #define BSP_USING_ADC
 #define BSP_USING_ADC1
+#define BSP_USING_ADC_CHANNEL1
 #define BSP_USING_UART
 #define BSP_USING_UART2
 #define BSP_USING_UART5
 #define BSP_USING_RTC
 /* end of On-chip Peripheral Drivers */
-
-/* Board extended module Drivers */
-
-/* end of Board extended module Drivers */
 /* end of Hardware Drivers Config */
 
 #endif
diff --git a/projects/Edgi_Talk_M55_XiaoZhi/.config b/projects/Edgi_Talk_M55_XiaoZhi/.config
index ec82ca96..1262e277 100644
--- a/projects/Edgi_Talk_M55_XiaoZhi/.config
+++ b/projects/Edgi_Talk_M55_XiaoZhi/.config
@@ -493,16 +493,30 @@ CONFIG_PKG_WEBNET_VER_NUM=0x20003
 # CONFIG_PKG_USING_FREEMODBUS is not set
 # CONFIG_PKG_USING_NANOPB is not set
 # CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
+CONFIG_WHD_SET_COUNTRY_FROM_HOST=y
+CONFIG_WHD_COUNTRY_CODE="AU"
+CONFIG_WHD_COUNTRY_CODE_REVISION=0
+# CONFIG_CY_WIFI_DEFAULT_ENABLE_POWERSAVE_MODE is not set
+CONFIG_CY_WIFI_USING_THREAD_INIT=y
+CONFIG_CY_WIFI_INIT_THREAD_PRIORITY=10
+CONFIG_CY_WIFI_INIT_THREAD_STACK_SIZE=2048
+CONFIG_CY_WIFI_WHD_THREAD_PRIORITY=6
+CONFIG_CY_WIFI_WHD_THREAD_STACK_SIZE=5120
+# CONFIG_WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS is not set
+CONFIG_WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL=y
+CONFIG_WHD_RESOURCES_FIRMWARE_PART_NAME="whd_firmware"
+CONFIG_WHD_RESOURCES_CLM_PART_NAME="whd_clm"
+CONFIG_WHD_RESOURCES_NVRAM_PART_NAME="whd_nvram"
+CONFIG_WHD_RESOURCES_BLOCK_SIZE=1024
 # CONFIG_WHD_USING_CHIP_CYW43438 is not set
 # CONFIG_WHD_USING_CHIP_CYW4373 is not set
 # CONFIG_WHD_USING_CHIP_CYW43012 is not set
 # CONFIG_WHD_USING_CHIP_CYW43439 is not set
 # CONFIG_WHD_USING_CHIP_CYW43022 is not set
 # CONFIG_WHD_USING_CHIP_CYW4343W is not set
-CONFIG_WHD_RESOURCES_BLOCK_SIZE=1024
-# CONFIG_CY_WIFI_DEFAULT_ENABLE_POWERSAVE_MODE is not set
-CONFIG_CY_WIFI_WHD_THREAD_PRIORITY=6
-CONFIG_CY_WIFI_WHD_THREAD_STACK_SIZE=5120
+CONFIG_WHD_USING_CHIP_CYW55500=y
+# CONFIG_WHD_USING_CHIP_CYW55572 is not set
+CONFIG_WHD_USING_WIFI6=y
 # CONFIG_CYBSP_USING_PIN_NAME is not set
 CONFIG_CYBSP_USING_PIN_NUMBER=y
 CONFIG_CYBSP_REG_ON_PIN=94
@@ -510,8 +524,15 @@ CONFIG_CYBSP_HOST_WAKE_IRQ_PIN=-1
 CONFIG_CYBSP_HOST_WAKE_IRQ_EVENT_FALL=y
 # CONFIG_CYBSP_HOST_WAKE_IRQ_EVENT_RISE is not set
 CONFIG_CYBSP_OOB_INTR_PRIORITY=2
-CONFIG_CY_WIFI_USING_THREAD_INIT=y
-CONFIG_CY_WIFI_INIT_THREAD_STACK_SIZE=2048
+CONFIG_WHD_PORTING_BSP=y
+CONFIG_WHD_PORTING_HAL=y
+# CONFIG_WHD_PORTING_RTOS is not set
+# CONFIG_WHD_LOG_LEVEL_NONE is not set
+CONFIG_WHD_LOG_LEVEL_ERROR=y
+# CONFIG_WHD_LOG_LEVEL_INFO is not set
+# CONFIG_WHD_LOG_LEVEL_DEBUG is not set
+# CONFIG_WHD_LOG_LEVEL_DATA_TRACE is not set
+# CONFIG_PKG_USING_ESP_HOSTED is not set
 
 #
 # Wi-Fi
@@ -629,6 +650,9 @@ CONFIG_PKG_NETUTILS_VER_NUM=0x99999
 # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
 # CONFIG_PKG_USING_LHC_MODBUS is not set
 # CONFIG_PKG_USING_QMODBUS is not set
+# CONFIG_PKG_USING_PNET is not set
+# CONFIG_PKG_USING_OPENER is not set
+# CONFIG_PKG_USING_FREEMQTT is not set
 # end of IoT - internet of things
 
 #
@@ -699,6 +723,7 @@ CONFIG_PKG_CJSON_VER="v1.7.17"
 # CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_AGILE_JSMN is not set
 # CONFIG_PKG_USING_PARSON is not set
+# CONFIG_PKG_USING_RYAN_JSON is not set
 # end of JSON: JavaScript Object Notation, a lightweight data-interchange format
 
 #
@@ -735,6 +760,7 @@ CONFIG_PKG_CJSON_VER="v1.7.17"
 # CONFIG_PKG_USING_U8G2 is not set
 # end of u8g2: a monochrome graphic library
 
+# CONFIG_PKG_USING_NES_SIMULATOR is not set
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
@@ -766,7 +792,9 @@ CONFIG_PKG_WAVPLAYER_VER="latest"
 #
 # tools packages
 #
+# CONFIG_PKG_USING_VECTOR is not set
 # CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_MCOREDUMP is not set
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
@@ -815,6 +843,12 @@ CONFIG_PKG_CPU_USAGE_VER="latest"
 # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 # CONFIG_PKG_USING_VOFA_PLUS is not set
 # CONFIG_PKG_USING_ZDEBUG is not set
+# CONFIG_PKG_USING_RVBACKTRACE is not set
+# CONFIG_PKG_USING_HPATCHLITE is not set
+# CONFIG_PKG_USING_THREAD_METRIC is not set
+# CONFIG_PKG_USING_UORB is not set
+# CONFIG_PKG_USING_RT_TUNNEL is not set
+# CONFIG_PKG_USING_VIRTUAL_TERMINAL is not set
 # end of tools packages
 
 #
@@ -863,7 +897,6 @@ CONFIG_PKG_RT_VSNPRINTF_FULL_VER="latest"
 #
 # CONFIG_PKG_USING_CMSIS_5 is not set
 # CONFIG_PKG_USING_CMSIS_CORE is not set
-# CONFIG_PKG_USING_CMSIS_DSP is not set
 # CONFIG_PKG_USING_CMSIS_NN is not set
 # CONFIG_PKG_USING_CMSIS_RTOS1 is not set
 # CONFIG_PKG_USING_CMSIS_RTOS2 is not set
@@ -907,6 +940,7 @@ CONFIG_LFS_CACHE_SIZE=256
 CONFIG_LFS_BLOCK_CYCLES=-1
 CONFIG_LFS_THREADSAFE=y
 CONFIG_LFS_LOOKAHEAD_MAX=128
+CONFIG_RT_DEF_LFS_DRIVERS=1
 # CONFIG_PKG_USING_DFS_JFFS2 is not set
 # CONFIG_PKG_USING_DFS_UFFS is not set
 # CONFIG_PKG_USING_LWEXT4 is not set
@@ -936,10 +970,15 @@ CONFIG_LFS_LOOKAHEAD_MAX=128
 # CONFIG_PKG_USING_FLASH_BLOB is not set
 # CONFIG_PKG_USING_MLIBC is not set
 # CONFIG_PKG_USING_TASK_MSG_BUS is not set
+# CONFIG_PKG_USING_UART_FRAMEWORK is not set
 # CONFIG_PKG_USING_SFDB is not set
 # CONFIG_PKG_USING_RTP is not set
 # CONFIG_PKG_USING_REB is not set
+# CONFIG_PKG_USING_RMP is not set
 # CONFIG_PKG_USING_R_RHEALSTONE is not set
+# CONFIG_PKG_USING_HEARTBEAT is not set
+# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set
+# CONFIG_PKG_USING_CHERRYECAT is not set
 # end of system packages
 
 #
@@ -953,10 +992,44 @@ CONFIG_LFS_LOOKAHEAD_MAX=128
 #
 # STM32 HAL & SDK Drivers
 #
+# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set
 # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
 # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set
 # CONFIG_PKG_USING_STM32WB55_SDK is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set
 # end of STM32 HAL & SDK Drivers
 
 #
@@ -987,7 +1060,98 @@ CONFIG_LFS_LOOKAHEAD_MAX=128
 
 # CONFIG_PKG_USING_NRF5X_SDK is not set
 # CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set
 # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
+# CONFIG_PKG_USING_MM32 is not set
+
+#
+# WCH HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_CH32V20x_SDK is not set
+# CONFIG_PKG_USING_CH32V307_SDK is not set
+# end of WCH HAL & SDK Drivers
+
+#
+# AT32 HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set
+# end of AT32 HAL & SDK Drivers
+
+#
+# HC32 DDL Drivers
+#
+# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set
+# end of HC32 DDL Drivers
+
+#
+# NXP HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set
+# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set
+# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set
+# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set
+# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set
+# end of NXP HAL & SDK Drivers
+
+#
+# NUVOTON Drivers
+#
+# CONFIG_PKG_USING_NUVOTON_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_NUVOTON_ARM926_LIB is not set
+# end of NUVOTON Drivers
+
+#
+# GD32 Drivers
+#
+# CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_GD32_RISCV_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_GD32VW55X_WIFI is not set
+# end of GD32 Drivers
+
+#
+# HPMicro SDK
+#
+# CONFIG_PKG_USING_HPM_SDK is not set
+# end of HPMicro SDK
+
+#
+# FT32 HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_FT32F0_STD_DRIVER is not set
+# CONFIG_PKG_USING_FT32F0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_FT32F4_STD_DRIVER is not set
+# CONFIG_PKG_USING_FT32F4_CMSIS_DRIVER is not set
+# end of FT32 HAL & SDK Drivers
 # end of HAL & SDK Drivers
 
 #
@@ -1025,14 +1189,19 @@ CONFIG_LFS_LOOKAHEAD_MAX=128
 # CONFIG_PKG_USING_BMI088 is not set
 # CONFIG_PKG_USING_HMC5883 is not set
 # CONFIG_PKG_USING_MAX6675 is not set
+# CONFIG_PKG_USING_MAX31855 is not set
 # CONFIG_PKG_USING_TMP1075 is not set
 # CONFIG_PKG_USING_SR04 is not set
 # CONFIG_PKG_USING_CCS811 is not set
 # CONFIG_PKG_USING_PMSXX is not set
 # CONFIG_PKG_USING_RT3020 is not set
 # CONFIG_PKG_USING_MLX90632 is not set
+# CONFIG_PKG_USING_MLX90382 is not set
+# CONFIG_PKG_USING_MLX90384 is not set
 # CONFIG_PKG_USING_MLX90393 is not set
 # CONFIG_PKG_USING_MLX90392 is not set
+# CONFIG_PKG_USING_MLX90394 is not set
+# CONFIG_PKG_USING_MLX90396 is not set
 # CONFIG_PKG_USING_MLX90397 is not set
 # CONFIG_PKG_USING_MS5611 is not set
 # CONFIG_PKG_USING_MAX31865 is not set
@@ -1058,6 +1227,9 @@ CONFIG_LFS_LOOKAHEAD_MAX=128
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_PAJ7620 is not set
 # CONFIG_PKG_USING_STHS34PF80 is not set
+# CONFIG_PKG_USING_P3T1755 is not set
+# CONFIG_PKG_USING_QMI8658 is not set
+# CONFIG_PKG_USING_ICM20948 is not set
 # end of sensors drivers
 
 #
@@ -1146,6 +1318,19 @@ CONFIG_LFS_LOOKAHEAD_MAX=128
 # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
 # CONFIG_PKG_USING_BT_MX01 is not set
 # CONFIG_PKG_USING_RGPOWER is not set
+# CONFIG_PKG_USING_BT_MX02 is not set
+# CONFIG_PKG_USING_GC9A01 is not set
+# CONFIG_PKG_USING_IK485 is not set
+# CONFIG_PKG_USING_SERVO is not set
+# CONFIG_PKG_USING_SEAN_WS2812B is not set
+# CONFIG_PKG_USING_IC74HC165 is not set
+# CONFIG_PKG_USING_IST8310 is not set
+# CONFIG_PKG_USING_ST7789_SPI is not set
+# CONFIG_PKG_USING_CAN_UDS is not set
+# CONFIG_PKG_USING_ISOTP_C is not set
+# CONFIG_PKG_USING_IKUNLED is not set
+# CONFIG_PKG_USING_INS5T8025 is not set
+# CONFIG_PKG_USING_ST7305 is not set
 # CONFIG_PKG_USING_SPI_TOOLS is not set
 # end of peripheral libraries and drivers
 
@@ -1162,6 +1347,7 @@ CONFIG_LFS_LOOKAHEAD_MAX=128
 # CONFIG_PKG_USING_QUEST is not set
 # CONFIG_PKG_USING_NAXOS is not set
 # CONFIG_PKG_USING_R_TINYMAIX is not set
+# CONFIG_PKG_USING_LLMCHAT is not set
 # end of AI packages
 
 #
@@ -1236,6 +1422,7 @@ CONFIG_PKG_OPTPARSE_VER="latest"
 # CONFIG_PKG_USING_KI is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
 # CONFIG_PKG_USING_CRCLIB is not set
+# CONFIG_PKG_USING_LIBCRC is not set
 # CONFIG_PKG_USING_LWGPS is not set
 # CONFIG_PKG_USING_STATE_MACHINE is not set
 # CONFIG_PKG_USING_DESIGN_PATTERN is not set
@@ -1246,6 +1433,7 @@ CONFIG_PKG_OPTPARSE_VER="latest"
 # CONFIG_PKG_USING_SOEM is not set
 # CONFIG_PKG_USING_QPARAM is not set
 # CONFIG_PKG_USING_CorevMCU_CLI is not set
+# CONFIG_PKG_USING_DRMP is not set
 # end of miscellaneous packages
 
 #
@@ -1259,6 +1447,7 @@ CONFIG_PKG_OPTPARSE_VER="latest"
 # CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
 # CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set
 # CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
+# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set
 # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
 # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
 # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
@@ -1500,7 +1689,7 @@ CONFIG_BSP_USING_AUDIO_RECORD=y
 CONFIG_ENABLE_STEREO_INPUT_FEED=y
 # CONFIG_BSP_USING_AHT20 is not set
 # CONFIG_BSP_USING_USB is not set
-CONFIG_BSP_USING_FREERTOS=y
+# CONFIG_BSP_USING_DEEPCRAFT_AI is not set
 # CONFIG_BSP_USING_LSM6DS3 is not set
 # end of Onboard Peripheral Drivers
 
@@ -1511,6 +1700,12 @@ CONFIG_BSP_USING_GPIO=y
 # CONFIG_BSP_USING_SPI is not set
 CONFIG_BSP_USING_ADC=y
 CONFIG_BSP_USING_ADC1=y
+# CONFIG_BSP_USING_ADC_CHANNEL0 is not set
+CONFIG_BSP_USING_ADC_CHANNEL1=y
+# CONFIG_BSP_USING_ADC_CHANNEL2 is not set
+# CONFIG_BSP_USING_ADC_CHANNEL3 is not set
+# CONFIG_BSP_USING_CANFD is not set
+# CONFIG_BSP_USING_IPC is not set
 CONFIG_BSP_USING_I2C=y
 CONFIG_BSP_USING_HW_I2C0=y
 CONFIG_BSP_USING_SOFT_I2C1=y
@@ -1524,7 +1719,10 @@ CONFIG_BSP_USING_RTC=y
 CONFIG_BSP_USING_HYPERAM=y
 CONFIG_BSP_USING_HYPERAM_SIZE=0x200000
 CONFIG_BSP_USING_PWM=y
+# CONFIG_BSP_USING_PWM5 is not set
+# CONFIG_BSP_USING_PWM6 is not set
 CONFIG_BSP_USING_PWM18=y
+# CONFIG_BSP_USING_PWM13 is not set
 # CONFIG_BSP_USING_TIM is not set
 # CONFIG_BSP_USING_WDT is not set
 CONFIG_BSP_USING_SDIO=y
@@ -1536,15 +1734,10 @@ CONFIG_BSP_USING_FILESYSTEM=y
 CONFIG_BSP_USING_SDCARD=y
 CONFIG_BSP_USING_FLASH=y
 CONFIG_BSP_USING_LITTLEFS=y
-CONFIG_RT_DEF_LFS_DRIVERS=1
 CONFIG_USING_LVGL=y
 CONFIG_BSP_USING_LVGL=y
 # CONFIG_LVGL_USING_DEMOS is not set
-# end of On-chip Peripheral Drivers
-
-#
-# Board extended module Drivers
-#
+CONFIG_BSP_USING_FREERTOS=y
 CONFIG_BSP_USING_XiaoZhi=y
 CONFIG_PKG_LIB_OPUS=y
 CONFIG_RT_LWIP_USING_WEBSOCKET=y
@@ -1553,15 +1746,16 @@ CONFIG_LWIP_ALTCP_TLS=1
 CONFIG_LWIP_ALTCP_TLS_MBEDTLS=1
 CONFIG_BSP_XIAOZHI_SOUND_DEVICE_NAME="sound0"
 CONFIG_BSP_XIAOZHI_MIC_DEVICE_NAME="mic0"
+# end of On-chip Peripheral Drivers
+
+#
+# Board extended module Drivers
+#
 CONFIG_RT_USING_WIFI_HOST_DRIVER=y
 
 #
 # WHD Configuration
 #
-CONFIG_WHD_SET_COUNTRY_FROM_HOST=y
-CONFIG_WHD_COUNTRY_CODE="AU"
-CONFIG_WHD_COUNTRY_CODE_REVISION=0
-CONFIG_CY_WIFI_INIT_THREAD_PRIORITY=10
 
 #
 # WHD Thread Configuration
@@ -1571,20 +1765,12 @@ CONFIG_CY_WIFI_INIT_THREAD_PRIORITY=10
 #
 # WHD Resources Configuration
 #
-# CONFIG_WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS is not set
-CONFIG_WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL=y
-CONFIG_WHD_RESOURCES_FIRMWARE_PART_NAME="whd_firmware"
-CONFIG_WHD_RESOURCES_CLM_PART_NAME="whd_clm"
-CONFIG_WHD_RESOURCES_NVRAM_PART_NAME="whd_nvram"
 # end of WHD Resources Configuration
 # end of WHD Configuration
 
 #
 # Hardware Configuration
 #
-CONFIG_WHD_USING_CHIP_CYW55500=y
-# CONFIG_WHD_USING_CHIP_CYW55572 is not set
-CONFIG_WHD_USING_WIFI6=y
 
 #
 # Pin Configuration
@@ -1595,16 +1781,7 @@ CONFIG_WHD_USING_WIFI6=y
 #
 # Porting options
 #
-CONFIG_WHD_PORTING_BSP=y
-CONFIG_WHD_PORTING_HAL=y
-# CONFIG_WHD_PORTING_RTOS is not set
 # end of Porting options
-
-# CONFIG_WHD_LOG_LEVEL_NONE is not set
-CONFIG_WHD_LOG_LEVEL_ERROR=y
-# CONFIG_WHD_LOG_LEVEL_INFO is not set
-# CONFIG_WHD_LOG_LEVEL_DEBUG is not set
-# CONFIG_WHD_LOG_LEVEL_DATA_TRACE is not set
 # end of Board extended module Drivers
 # end of Hardware Drivers Config
 
diff --git a/projects/Edgi_Talk_M55_XiaoZhi/Kconfig b/projects/Edgi_Talk_M55_XiaoZhi/Kconfig
index 3942a8bf..518f2689 100644
--- a/projects/Edgi_Talk_M55_XiaoZhi/Kconfig
+++ b/projects/Edgi_Talk_M55_XiaoZhi/Kconfig
@@ -31,4 +31,5 @@ config PLATFORM_DIR
 source "$RTT_DIR/Kconfig"
 source "$PKGS_DIR/Kconfig"
 source "$BSP_DIR/board/Kconfig"
+source "$RTT_DIR/../libraries/M55_Config/Kconfig"
 source "$RTT_DIR/../libraries/components/CherryUSB-1.6.0/Kconfig.rtt"
diff --git a/projects/Edgi_Talk_M55_XiaoZhi/board/Kconfig b/projects/Edgi_Talk_M55_XiaoZhi/board/Kconfig
index 6575d463..7e2d9efa 100644
--- a/projects/Edgi_Talk_M55_XiaoZhi/board/Kconfig
+++ b/projects/Edgi_Talk_M55_XiaoZhi/board/Kconfig
@@ -1,279 +1,4 @@
-menu "Hardware Drivers Config"
-
-config SOC_SERIES_IFX_PSOCE84
-    bool 
-    select RT_USING_COMPONENTS_INIT
-    select RT_USING_USER_MAIN
-    default y
-
-config KIT_PROCE84_EVK_M55
-    bool 
-    default y
-
-menu "Onboard Peripheral Drivers"
-
-    config BSP_USING_USB_TO_UART
-        bool "Enable USB TO UART (uart2)"
-        select BSP_USING_UART
-        select BSP_USING_UART2
-        default y
-
-    menuconfig BSP_USING_AUDIO
-        bool "Enable Audio Device"
-        select RT_USING_AUDIO
-        select BSP_USING_I2C
-        default n
-
-        if BSP_USING_AUDIO
-            config BSP_USING_AUDIO_PLAY
-            bool "Enable Audio Play"
-            default n
-
-            menuconfig BSP_USING_AUDIO_RECORD
-                bool "Enable Audio Record"
-                default n
-                if BSP_USING_AUDIO_RECORD
-                    config  ENABLE_STEREO_INPUT_FEED
-                    bool "Enable STEREO INPUT FEED"
-                    default y
-                endif
-        endif
-
-    config BSP_USING_AHT20
-        bool "Enable AHT20"
-        default n
-        select PKG_USING_AHT10
-        select BSP_USING_I2C
-        if BSP_USING_AHT20
-            config PKG_USING_AHT10_SAMPLE 
-            bool "Enable AHT20 SAMPLE"
-            default n
-            if PKG_USING_AHT10_SAMPLE
-                config PKG_AHT10_I2C_BUS_NAME
-                    string  "PKG_AHT20_I2C_BUS_NAME"
-                    default "i2c1"
-            endif
-        endif
-
-    config BSP_USING_USB
-        bool "Enable USB"
-        default n
-        if BSP_USING_USB
-            config BSP_USING_FREERTOS
-            bool "Enable FREERTOS ABSTRACTION"
-            default n
-            select PKG_USING_FREERTOS_WRAPPER
-        endif
-
-    config BSP_USING_LSM6DS3
-        bool "Enable LSM6DS3"
-        default n
-        select BSP_USING_I2C
-
-endmenu
-
-menu "On-chip Peripheral Drivers"
-
-    config BSP_USING_GPIO
-        bool "Enable GPIO"
-        select RT_USING_PIN
-        default y
-
-    menuconfig BSP_USING_SPI
-        bool "Enable SPI"
-        select RT_USING_PIN
-        default n
-        if BSP_USING_SPI
-            config BSP_USING_SPI1
-                bool "Enable SPI1"
-                default n
-            config BSP_USING_SPI2
-                bool "Enable SPI2"
-                default n
-        endif
-
-    menuconfig BSP_USING_ADC
-        bool "Enable ADC"
-        select RT_USING_ADC
-        default n
-        if BSP_USING_ADC
-            config BSP_USING_ADC1
-                bool "Enable ADC1"
-                default n
-        endif
-
-    menuconfig BSP_USING_I2C
-        bool "Enable I2C"
-        default n
-        select RT_USING_I2C
-        if BSP_USING_I2C
-            config BSP_USING_HW_I2C0
-                bool "Enable HW I2C0"
-                default n
-            config BSP_USING_SOFT_I2C1
-                bool "Enable SOFT I2C1"
-                default n
-                if BSP_USING_SOFT_I2C1
-                    config BSP_SOFT_I2C1_SCL_PIN
-                    int "I2C1 SCL PIN number"
-                    default 25
-                    config BSP_SOFT_I2C1_SDA_PIN
-                    int "I2C1 SDA PIN number"
-                    default 107
-                endif
-        endif
-
-    menuconfig BSP_USING_UART
-        bool "Enable UART"
-        default y
-        select RT_USING_SERIAL
-        if BSP_USING_UART
-            config BSP_USING_UART1
-                bool "Enable UART1"
-                default n
-                
-            config BSP_USING_UART2
-                bool "Enable UART2"
-                default y
-                
-            config BSP_USING_UART5
-                bool "Enable UART5"
-                default n
-        endif
-
-    config BSP_USING_RTC
-        bool "Enable RTC"
-        select RT_USING_RTC
-        default y
-
-        config BSP_USING_HYPERAM
-            bool "Enable HYPERAM"
-            if BSP_USING_HYPERAM
-                config BSP_USING_HYPERAM_SIZE 
-                    hex "(HEX)HYPERAM SIZE"
-                    default 0x800000
-            endif
-
-    menuconfig BSP_USING_PWM
-        bool "Enable PWM"
-        select RT_USING_PWM
-        default n
-        if BSP_USING_PWM
-            config BSP_USING_PWM18
-                bool "Enable PWM18"
-                default y
-        endif
-
-    menuconfig BSP_USING_TIM
-        bool "Enable Timer"
-        default n
-        select RT_USING_HWTIMER
-        if BSP_USING_TIM
-            config BSP_USING_TIM0
-                bool "Enable TIM0"
-                default n
-        endif
-
-    menuconfig BSP_USING_WDT
-        bool "Enable WDT"
-        select RT_USING_WDT
-        default n
-
-    menuconfig BSP_USING_SDIO
-        bool "Enable SDIO"
-        select RT_USING_SDIO
-        default n
-
-        if BSP_USING_SDIO
-            config BSP_USING_SDIO0
-                bool "Enable SDIO0"
-                default n
-            
-            config BSP_USING_SDIO1
-                bool "Enable SDIO1"
-                default y
-        endif
-
-    menuconfig BSP_USING_LCD
-        bool "Enable MIPI LCD controller"
-        select RT_USING_LCD
-        default n
-        if BSP_USING_LCD
-            config COMPONENT_MTB_DISPLAY_tl043wvv02
-                bool "Enable MIPI LCD Screen tl043wvv02"
-                default n
-        endif
-
-    menuconfig BSP_USING_FILESYSTEM
-        bool "Enable filesystem support"
-        select RT_USING_DFS
-        select RT_USING_POSIX_FS
-        select RT_USING_DFS_ROMFS
-        default n
-        if BSP_USING_FILESYSTEM
-            config BSP_USING_SDCARD
-                bool "Enable SDCARD (sd card)"
-                select RT_USING_DFS_ELMFAT
-                select BSP_USING_SDIO
-                select BSP_USING_SDIO1
-                default n
-
-            config BSP_USING_FLASH
-                bool "Enable QSPI Flash filesystem"
-                select RT_USING_FAL
-                select BSP_USING_LITTLEFS
-                select RT_USING_MTD_NOR
-                default y
-
-            if BSP_USING_FLASH
-                config BSP_USING_LITTLEFS
-                    bool "Enable LittleFS"
-                    default n
-                if BSP_USING_LITTLEFS
-                    config LFS_READ_SIZE
-                        int "disk read size"
-                        default 256
-                    config LFS_PROG_SIZE
-                        int "disk write size"
-                        default 256
-                    config LFS_BLOCK_SIZE
-                        int "disk block size"
-                        default 4096
-                    config LFS_CACHE_SIZE
-                        int "lfs r/w cache size"
-                        default LFS_PROG_SIZE
-                    config LFS_BLOCK_CYCLES
-                        int "lfs enable wear leveling. -1 is disable."
-                        default -1
-                    config LFS_THREADSAFE
-                        bool
-                        default y
-                    config LFS_LOOKAHEAD_MAX
-                        int "lfs lookahead size"
-                        default 128
-                    config RT_DEF_LFS_DRIVERS
-                        int "lfs drivers count"
-                        default 1
-                endif
-            endif
-        endif
-
-    menuconfig USING_LVGL
-        bool "Enable LVGL"
-        select BSP_USING_LVGL
-        default n
-        if USING_LVGL
-            config BSP_USING_LVGL
-                bool "Enable BSP_USING_LVGL"
-                default n
-            config LVGL_USING_DEMOS
-                bool "Enable LVGL_USING_DEMOS"
-                default n
-        endif
-        
-endmenu
-
-menu "Board extended module Drivers"
+menu "Xiaozhi Configuration Options"
 
     config BSP_USING_XiaoZhi
         bool "Enable XiaoZhi"
@@ -305,13 +30,4 @@ menu "Board extended module Drivers"
                 default "mic0"
         endif
 
-    config BSP_USING_FREERTOS
-        bool "Enable FREERTOS ABSTRACTION"
-        default n
-        select PKG_USING_FREERTOS_WRAPPER
-
-    source "libraries/components/wifi-host-driver/Kconfig"
-
-endmenu
-
 endmenu
diff --git a/projects/Edgi_Talk_M55_XiaoZhi/packages/opus-1.4/SConscript b/projects/Edgi_Talk_M55_XiaoZhi/packages/opus-1.4/SConscript
index 62cdca9d..a90d0b35 100644
--- a/projects/Edgi_Talk_M55_XiaoZhi/packages/opus-1.4/SConscript
+++ b/projects/Edgi_Talk_M55_XiaoZhi/packages/opus-1.4/SConscript
@@ -32,7 +32,7 @@ if USE_PREBUILT:
     print('=== Using prebuilt libopus.a ===')
     LIBS = ['opus']
     LIBPATH = [cwd + '/lib']
-    group = DefineGroup('libopus', [], depend = ['PKG_LIB_OPUS'], 
+    group = DefineGroup('libopus', [], depend = [''], 
                         CPPPATH = path, CPPDEFINES = CPPDEFINES,
                         LIBS = LIBS, LIBPATH = LIBPATH)
 else:
@@ -53,7 +53,7 @@ else:
     else:    
         LOCAL_CCFLAGS = ''
     
-    group = DefineGroup('libopus', src, depend = ['PKG_LIB_OPUS'], 
+    group = DefineGroup('libopus', src, depend = [''], 
                         CPPPATH = path, CPPDEFINES = CPPDEFINES, 
                         LOCAL_CCFLAGS = LOCAL_CCFLAGS)
 
diff --git a/projects/Edgi_Talk_M55_XiaoZhi/rtconfig.h b/projects/Edgi_Talk_M55_XiaoZhi/rtconfig.h
index 773acc6c..611db383 100644
--- a/projects/Edgi_Talk_M55_XiaoZhi/rtconfig.h
+++ b/projects/Edgi_Talk_M55_XiaoZhi/rtconfig.h
@@ -302,16 +302,29 @@
 /* end of Select supported modules */
 #define PKG_USING_WEBNET_V203
 #define PKG_WEBNET_VER_NUM 0x20003
-#define WHD_RESOURCES_BLOCK_SIZE 1024
+#define WHD_SET_COUNTRY_FROM_HOST
+#define WHD_COUNTRY_CODE "AU"
+#define WHD_COUNTRY_CODE_REVISION 0
+#define CY_WIFI_USING_THREAD_INIT
+#define CY_WIFI_INIT_THREAD_PRIORITY 10
+#define CY_WIFI_INIT_THREAD_STACK_SIZE 2048
 #define CY_WIFI_WHD_THREAD_PRIORITY 6
 #define CY_WIFI_WHD_THREAD_STACK_SIZE 5120
+#define WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL
+#define WHD_RESOURCES_FIRMWARE_PART_NAME "whd_firmware"
+#define WHD_RESOURCES_CLM_PART_NAME "whd_clm"
+#define WHD_RESOURCES_NVRAM_PART_NAME "whd_nvram"
+#define WHD_RESOURCES_BLOCK_SIZE 1024
+#define WHD_USING_CHIP_CYW55500
+#define WHD_USING_WIFI6
 #define CYBSP_USING_PIN_NUMBER
 #define CYBSP_REG_ON_PIN 94
 #define CYBSP_HOST_WAKE_IRQ_PIN -1
 #define CYBSP_HOST_WAKE_IRQ_EVENT_FALL
 #define CYBSP_OOB_INTR_PRIORITY 2
-#define CY_WIFI_USING_THREAD_INIT
-#define CY_WIFI_INIT_THREAD_STACK_SIZE 2048
+#define WHD_PORTING_BSP
+#define WHD_PORTING_HAL
+#define WHD_LOG_LEVEL_ERROR
 
 /* Wi-Fi */
 
@@ -432,6 +445,7 @@
 #define LFS_BLOCK_CYCLES -1
 #define LFS_THREADSAFE
 #define LFS_LOOKAHEAD_MAX 128
+#define RT_DEF_LFS_DRIVERS 1
 /* end of system packages */
 
 /* peripheral libraries and drivers */
@@ -449,6 +463,38 @@
 /* Kendryte SDK */
 
 /* end of Kendryte SDK */
+
+/* WCH HAL & SDK Drivers */
+
+/* end of WCH HAL & SDK Drivers */
+
+/* AT32 HAL & SDK Drivers */
+
+/* end of AT32 HAL & SDK Drivers */
+
+/* HC32 DDL Drivers */
+
+/* end of HC32 DDL Drivers */
+
+/* NXP HAL & SDK Drivers */
+
+/* end of NXP HAL & SDK Drivers */
+
+/* NUVOTON Drivers */
+
+/* end of NUVOTON Drivers */
+
+/* GD32 Drivers */
+
+/* end of GD32 Drivers */
+
+/* HPMicro SDK */
+
+/* end of HPMicro SDK */
+
+/* FT32 HAL & SDK Drivers */
+
+/* end of FT32 HAL & SDK Drivers */
 /* end of HAL & SDK Drivers */
 
 /* sensors drivers */
@@ -543,7 +589,6 @@
 #define BSP_USING_AUDIO_PLAY
 #define BSP_USING_AUDIO_RECORD
 #define ENABLE_STEREO_INPUT_FEED
-#define BSP_USING_FREERTOS
 /* end of Onboard Peripheral Drivers */
 
 /* On-chip Peripheral Drivers */
@@ -551,6 +596,7 @@
 #define BSP_USING_GPIO
 #define BSP_USING_ADC
 #define BSP_USING_ADC1
+#define BSP_USING_ADC_CHANNEL1
 #define BSP_USING_I2C
 #define BSP_USING_HW_I2C0
 #define BSP_USING_SOFT_I2C1
@@ -572,13 +618,9 @@
 #define BSP_USING_SDCARD
 #define BSP_USING_FLASH
 #define BSP_USING_LITTLEFS
-#define RT_DEF_LFS_DRIVERS 1
 #define USING_LVGL
 #define BSP_USING_LVGL
-/* end of On-chip Peripheral Drivers */
-
-/* Board extended module Drivers */
-
+#define BSP_USING_FREERTOS
 #define BSP_USING_XiaoZhi
 #define PKG_LIB_OPUS
 #define RT_LWIP_USING_WEBSOCKET
@@ -587,33 +629,25 @@
 #define LWIP_ALTCP_TLS_MBEDTLS 1
 #define BSP_XIAOZHI_SOUND_DEVICE_NAME "sound0"
 #define BSP_XIAOZHI_MIC_DEVICE_NAME "mic0"
+/* end of On-chip Peripheral Drivers */
+
+/* Board extended module Drivers */
+
 #define RT_USING_WIFI_HOST_DRIVER
 
 /* WHD Configuration */
 
-#define WHD_SET_COUNTRY_FROM_HOST
-#define WHD_COUNTRY_CODE "AU"
-#define WHD_COUNTRY_CODE_REVISION 0
-#define CY_WIFI_INIT_THREAD_PRIORITY 10
-
 /* WHD Thread Configuration */
 
 /* end of WHD Thread Configuration */
 
 /* WHD Resources Configuration */
 
-#define WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL
-#define WHD_RESOURCES_FIRMWARE_PART_NAME "whd_firmware"
-#define WHD_RESOURCES_CLM_PART_NAME "whd_clm"
-#define WHD_RESOURCES_NVRAM_PART_NAME "whd_nvram"
 /* end of WHD Resources Configuration */
 /* end of WHD Configuration */
 
 /* Hardware Configuration */
 
-#define WHD_USING_CHIP_CYW55500
-#define WHD_USING_WIFI6
-
 /* Pin Configuration */
 
 /* end of Pin Configuration */
@@ -621,10 +655,7 @@
 
 /* Porting options */
 
-#define WHD_PORTING_BSP
-#define WHD_PORTING_HAL
 /* end of Porting options */
-#define WHD_LOG_LEVEL_ERROR
 /* end of Board extended module Drivers */
 /* end of Hardware Drivers Config */