update to v0.1.6

Author: dh-04

drivers/baremetal/drv_clk.c

@@ -48,7 +48,7 @@ void system_clock_config(int target_freq_Mhz)
 #endif
     if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
     {
-      Error_Handler();
+        Error_Handler();
     }
     /** Initializes the CPU, AHB and APB busses clocks
     */
@@ -72,10 +72,10 @@ void system_clock_config(int target_freq_Mhz)
     if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 #endif
 #if defined(STM32F105xC) || defined(STM32F107xC)
-        if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 #endif
     {
-      Error_Handler();
+        Error_Handler();
     }
 }
 

drivers/baremetal/drv_usart.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2019-11-09     xiangxistu   first version
+ * 2020-05-18     chenyaxing   modify stm32_uart_config struct
  */
 
 #include <string.h>
@@ -216,14 +217,15 @@ static long stm32_gpio_clk_enable(GPIO_TypeDef *gpiox)
     return 0;
 }
 
-char * up_char(char * c)
+static int up_char(char * c)
 {
     if ((*c >= 'a') && (*c <= 'z'))
     {
         *c = *c - 32;
     }
     return 0;
 }
+
 static void get_pin_by_name(const char* pin_name, GPIO_TypeDef **port, uint16_t *pin)
 {
     int pin_num = atoi((char*) &pin_name[2]);
@@ -456,4 +458,3 @@ void print_char(char c)
 {
     HAL_UART_Transmit(&handle, (uint8_t *) (&c), 1, 1);
 }
-

drivers/baremetal/uart_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-10-30     SummerGift   first version
  * 2019-01-03     zylx         modify dma support
+ * 2020-05-18     chenyaxing   modify uart_config struct
  */
 
 #ifndef __UART_CONFIG_H__

drivers/nano/drv_clk.c

@@ -47,7 +47,7 @@ void system_clock_config(int target_freq_Mhz)
 #endif
     if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
     {
-      Error_Handler();
+        Error_Handler();
     }
     /** Initializes the CPU, AHB and APB busses clocks
     */
@@ -71,10 +71,10 @@ void system_clock_config(int target_freq_Mhz)
     if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 #endif
 #if defined(STM32F105xC) || defined(STM32F107xC)
-        if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 #endif
     {
-      Error_Handler();
+        Error_Handler();
     }
 }
 

drivers/nano/drv_usart.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2019-11-09     xiangxistu   first version
+ * 2020-05-18     chenyaxing   modify usart3 remap check
  */
 
 #include "stdlib.h"
@@ -222,14 +223,15 @@ static rt_err_t stm32_gpio_clk_enable(GPIO_TypeDef *gpiox)
     return RT_EOK;
 }
 
-char * up_char(char * c)
+static int up_char(char * c)
 {
     if ((*c >= 'a') && (*c <= 'z'))
     {
         *c = *c - 32;
     }
     return 0;
 }
+
 static void get_pin_by_name(const char* pin_name, GPIO_TypeDef **port, uint16_t *pin)
 {
     int pin_num = atoi((char*) &pin_name[2]);

drivers/rtt/drv_usart.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-10-30     SummerGift   first version
+ * 2020-05-18     chenyaxing   modify usart3 remap check
  */
 #include "string.h"
 #include "stdlib.h"
@@ -329,14 +330,16 @@ static rt_err_t stm32_gpio_clk_enable(GPIO_TypeDef *gpiox)
 
     return RT_EOK;
 }
-char * up_char(char * c)
+
+static int up_char(char * c)
 {
     if ((*c >= 'a') && (*c <= 'z'))
     {
         *c = *c - 32;
     }
     return 0;
 }
+
 static void get_pin_by_name(const char* pin_name, GPIO_TypeDef **port, uint16_t *pin)
 {
     int pin_num = atoi((char*) &pin_name[2]);