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yans6666Rbb666
yans6666
authored and
Rbb666
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[bsp/renesas][drivers] Added adaptation for ra8p1.
1 parent d79475e commit 99e7854

22 files changed

Lines changed: 737 additions & 75 deletions

‎bsp/renesas/libraries/HAL_Drivers/drivers/SConscript‎

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@@ -62,6 +62,9 @@ if GetDepend(['BSP_USING_SDHI']):
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if GetDepend(['BSP_USING_LCD']):
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src += ['drv_lcd.c']
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if GetDepend(['BSP_USING_RS485']):
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src += ['drv_rs485.c']
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path = [cwd]
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path += [cwd + '/config']
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‎bsp/renesas/libraries/HAL_Drivers/drivers/config/drv_config.h‎

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@@ -195,6 +195,32 @@ extern "C"
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#endif /* SOC_SERIES_R7FA8M85 */
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#ifdef SOC_SERIES_R7KA8P1
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#include "ra8/uart_config.h"
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#ifdef BSP_USING_PWM
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#include "ra8/pwm_config.h"
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#endif
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#ifdef BSP_USING_ADC
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#include "ra8/adc_config.h"
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#endif
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#ifdef BSP_USING_DAC
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#include "ra8/dac_config.h"
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#endif
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#ifdef BSP_USING_TIM
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#include "ra8/timer_config.h"
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#endif
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#ifdef BSP_USING_CANFD
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#include "ra8/canfd_config.h"
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#endif
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#endif /* SOC_SERIES_R7KA8P1 */
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#ifdef SOC_SERIES_R9A07G0
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#include "rzt/uart_config.h"
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#include "rzt/timer_config.h"

‎bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/adc_config.h‎

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Original file line numberDiff line numberDiff line change
@@ -31,7 +31,11 @@ struct ra_adc_map
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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#ifdef SOC_SERIES_R7KA8P1
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const adc_b_scan_cfg_t *g_channel_cfg;
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#else
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const adc_channel_cfg_t *g_channel_cfg;
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#endif
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};
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#endif
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#endif

‎bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/canfd_config.h‎

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@@ -0,0 +1,54 @@
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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-02-11 kurisaW first version
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*/
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#ifndef __CAN_CONFIG_H__
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#define __CAN_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#if defined(BSP_USING_CANFD)
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#if defined(BSP_USING_CAN0)
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#ifndef CAN0_CONFIG
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#define CAN0_CONFIG \
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{ \
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.name = "canfd0", \
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.num_of_mailboxs = 48, \
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.p_api_ctrl = &g_canfd0_ctrl, \
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.p_cfg = &g_canfd0_cfg, \
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}
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#endif /* CAN0_CONFIG */
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#endif /* BSP_USING_CAN0 */
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#if defined(BSP_USING_CAN1)
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#ifndef CAN1_CONFIG
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#define CAN1_CONFIG \
39+
{ \
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.name = "canfd1", \
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.num_of_mailboxs = 48, \
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.p_api_ctrl = &g_canfd1_ctrl, \
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.p_cfg = &g_canfd1_cfg, \
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}
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#endif /* CAN1_CONFIG */
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#endif /* BSP_USING_CAN1 */
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#ifdef __cplusplus
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}
50+
#endif
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#endif /* BSP_USING_CANFD */
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54+
#endif /* __CAN_CONFIG_H__ */

‎bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/pwm_config.h‎

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Original file line numberDiff line numberDiff line change
@@ -58,6 +58,9 @@ enum
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#endif
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#ifdef BSP_USING_PWM12
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BSP_PWM12_INDEX,
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#endif
62+
#ifdef BSP_USING_PWM13
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BSP_PWM13_INDEX,
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#endif
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BSP_PWMS_NUM
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};

‎bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/timer_config.h‎

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@@ -0,0 +1,70 @@
1+
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
7+
* Date Author Notes
8+
* 2023-09-04 Rbb666 first version
9+
*/
10+
11+
#ifndef __TIMER_CONFIG_H__
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#define __TIMER_CONFIG_H__
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14+
#include <rtthread.h>
15+
#include "hal_data.h"
16+
17+
#ifdef SOC_SERIES_R7KA8P1
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#ifdef __cplusplus
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extern "C"
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{
22+
#endif
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24+
#define PLCKD_PRESCALER_MAX_SELECT 9
25+
#define PLCKD_PRESCALER_250M (250000000U)
26+
#define PLCKD_PRESCALER_200M (200000000U)
27+
#define PLCKD_PRESCALER_100M (100000000U)
28+
#define PLCKD_PRESCALER_50M (50000000U)
29+
#define PLCKD_PRESCALER_25M (25000000U)
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#define PLCKD_PRESCALER_12_5M (12500000U)
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#define PLCKD_PRESCALER_6_25M (6250000U)
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#define PLCKD_PRESCALER_3_125M (3125000U)
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#define PLCKD_PRESCALER_1_5625M (1562500U)
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#ifndef TMR_DEV_INFO_CONFIG
36+
#define TMR_DEV_INFO_CONFIG \
37+
{ \
38+
.maxfreq = 250000000, \
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.minfreq = 1562500, \
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.maxcnt = 0XFFFFFFFF, \
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.cntmode = HWTIMER_CNTMODE_UP, \
42+
}
43+
#endif /* TIM_DEV_INFO_CONFIG */
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enum
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{
47+
#ifdef BSP_USING_TIM0
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BSP_TIMER0_INDEX,
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#endif
50+
#ifdef BSP_USING_TIM1
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BSP_TIMER1_INDEX,
52+
#endif
53+
BSP_TIMERS_NUM
54+
};
55+
56+
#define TIMER_DRV_INITIALIZER(num) \
57+
{ \
58+
.name = "timer" #num, \
59+
.g_cfg = &g_timer##num##_cfg, \
60+
.g_ctrl = &g_timer##num##_ctrl, \
61+
.g_timer = &g_timer##num, \
62+
}
63+
64+
#ifdef __cplusplus
65+
}
66+
#endif
67+
68+
#endif /* SOC_SERIES_R7KA8P1 */
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70+
#endif /* __TIMER_CONFIG_H__ */

‎bsp/renesas/libraries/HAL_Drivers/drivers/drv_adc.c‎

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Original file line numberDiff line numberDiff line change
@@ -20,14 +20,29 @@
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#endif /* DRV_DEBUG */
2121
#include <rtdbg.h>
2222

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#if defined(SOC_SERIES_R7KA8P1)
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25+
#define R_ADC_Open R_ADC_B_Open
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#define R_ADC_ScanCfg R_ADC_B_ScanCfg
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#define R_ADC_ScanStart R_ADC_B_ScanStart
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#define R_ADC_Read32 R_ADC_B_Read32
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#define R_ADC_Read R_ADC_B_Read
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#define R_ADC_ScanStop R_ADC_B_ScanStop
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#endif
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2334
struct ra_adc_map ra_adc[] =
2435
{
2536
#ifdef BSP_USING_ADC0
2637
{
2738
.device_name = "adc0",
2839
.g_cfg = &g_adc0_cfg,
2940
.g_ctrl = &g_adc0_ctrl,
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#ifdef SOC_SERIES_R7KA8P1
42+
.g_channel_cfg = &g_adc0_scan_cfg,
43+
#else
3044
.g_channel_cfg = &g_adc0_channel_cfg,
45+
#endif
3146
},
3247
#endif
3348
#ifdef BSP_USING_ADC1

‎bsp/renesas/libraries/HAL_Drivers/drivers/drv_can.c‎

Lines changed: 40 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,45 @@ static const struct ra_baud_rate_tab can_baud_rate_tab[] =
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#define R_CAN_InfoGet R_CANFD_InfoGet
5959
#define R_CAN_Write R_CANFD_Write
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61+
#define can0_callback canfd0_callback
62+
#define can1_callback canfd1_callback
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64+
const canfd_afl_entry_t p_canfd0_afl[CANFD_CFG_AFL_CH0_RULE_NUM] =
65+
{
66+
{
67+
.id =
68+
{
69+
.id = 0x00,
70+
.frame_type = CAN_FRAME_TYPE_DATA,
71+
.id_mode = CAN_ID_MODE_STANDARD
72+
},
73+
.destination =
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{
75+
.minimum_dlc = CANFD_MINIMUM_DLC_0,
76+
.rx_buffer = CANFD_RX_MB_NONE,
77+
.fifo_select_flags = CANFD_RX_FIFO_0
78+
}
79+
},
80+
};
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const canfd_afl_entry_t p_canfd1_afl[CANFD_CFG_AFL_CH1_RULE_NUM] =
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{
84+
{
85+
.id =
86+
{
87+
.id = 0x01,
88+
.frame_type = CAN_FRAME_TYPE_DATA,
89+
.id_mode = CAN_ID_MODE_STANDARD
90+
},
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.destination =
92+
{
93+
.minimum_dlc = CANFD_MINIMUM_DLC_1,
94+
.rx_buffer = CANFD_RX_MB_NONE,
95+
.fifo_select_flags = CANFD_RX_FIFO_1
96+
}
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},
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};
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#endif
62101

63102
static rt_uint32_t get_can_baud_index(rt_uint32_t baud)
@@ -193,7 +232,7 @@ rt_ssize_t ra_can_sendmsg(struct rt_can_device *can_dev, const void *buf, rt_uin
193232
g_can_tx_frame.id_mode = msg_rt->ide;
194233
g_can_tx_frame.type = msg_rt->rtr;
195234
g_can_tx_frame.data_length_code = msg_rt->len;
196-
#if defined(BSP_USING_CANFD) && defined(BSP_USING_CAN_RZ)
235+
#if defined(BSP_USING_CANFD) && (defined(BSP_USING_CAN_RZ) || defined(BSP_USING_CAN_RA))
197236
g_can_tx_frame.options = 0;
198237
#elif defined(BSP_USING_CANFD)
199238
g_can_tx_frame.options = CANFD_FRAME_OPTION_FD | CANFD_FRAME_OPTION_BRS;

‎bsp/renesas/libraries/HAL_Drivers/drivers/drv_dac.c‎

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Original file line numberDiff line numberDiff line change
@@ -21,6 +21,15 @@
2121
#endif /* DRV_DEBUG */
2222
#include <rtdbg.h>
2323

24+
#if defined(SOC_SERIES_R7KA8P1)
25+
26+
#define R_DAC_Open R_DAC_B_Open
27+
#define R_DAC_Write R_DAC_B_Write
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#define R_DAC_Start R_DAC_B_Start
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#define R_DAC_Stop R_DAC_B_Stop
30+
31+
#endif
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2433
struct ra_dac_map ra_dac[] =
2534
{
2635
#ifdef BSP_USING_DAC0

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