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[BSP][NS800RT7P65] Add QSPI driver for NS800RT7xxx#11449
1 parent 9ed6154 commit c992650

5 files changed

Lines changed: 229 additions & 3 deletions

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‎bsp/novosns/ns800/libraries/HAL_Drivers/drivers/SConscript‎

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@@ -27,6 +27,8 @@ if GetDepend('BSP_USING_TIM'):
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if GetDepend('BSP_USING_SPI'):
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src += ['drv_spi.c']
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if GetDepend('BSP_USING_QSPI'):
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src += ['drv_qspi.c']
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group = DefineGroup('HAL_Drivers', src, depend = [''], CPPPATH = path)
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‎bsp/novosns/ns800/libraries/HAL_Drivers/drivers/drv_qspi.c‎

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/*
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* Copyright (c) 2006-2026, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2026-05-17 lugl first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "qspi.h"
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#include "board.h"
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#ifdef RT_USING_QSPI
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/*===========================================================================
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* GPIO initialization
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*===========================================================================*/
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static void qspi_pin_init(void)
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{
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GPIO_setPinConfig(GPIO_15_QSPI_NCS);
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GPIO_setAnalogMode(GPIO_15, GPIO_ANALOG_DISABLED);
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GPIO_setPadConfig(GPIO_15, GPIO_PIN_TYPE_PULLUP);
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GPIO_setQualificationMode(GPIO_15, GPIO_QUAL_ASYNC);
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GPIO_setPinConfig(GPIO_16_QSPI_D0);
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GPIO_setAnalogMode(GPIO_16, GPIO_ANALOG_DISABLED);
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GPIO_setPadConfig(GPIO_16, GPIO_PIN_TYPE_PULLUP);
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GPIO_setQualificationMode(GPIO_16, GPIO_QUAL_ASYNC);
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GPIO_setDirectionMode(GPIO_16, GPIO_DIR_MODE_OUT);
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GPIO_setPinConfig(GPIO_17_QSPI_D1);
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GPIO_setAnalogMode(GPIO_17, GPIO_ANALOG_DISABLED);
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GPIO_setPadConfig(GPIO_17, GPIO_PIN_TYPE_PULLUP);
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GPIO_setQualificationMode(GPIO_17, GPIO_QUAL_ASYNC);
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GPIO_setDirectionMode(GPIO_17, GPIO_DIR_MODE_IN);
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GPIO_setPinConfig(GPIO_18_QSPI_D2);
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GPIO_setAnalogMode(GPIO_18, GPIO_ANALOG_DISABLED);
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GPIO_setPadConfig(GPIO_18, GPIO_PIN_TYPE_PULLUP);
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GPIO_setQualificationMode(GPIO_18, GPIO_QUAL_ASYNC);
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GPIO_setDirectionMode(GPIO_18, GPIO_DIR_MODE_IN);
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GPIO_setPinConfig(GPIO_20_QSPI_D3);
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GPIO_setAnalogMode(GPIO_20, GPIO_ANALOG_DISABLED);
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GPIO_setPadConfig(GPIO_20, GPIO_PIN_TYPE_PULLUP);
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GPIO_setQualificationMode(GPIO_20, GPIO_QUAL_ASYNC);
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GPIO_setDirectionMode(GPIO_20, GPIO_DIR_MODE_IN);
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GPIO_setPinConfig(GPIO_21_QSPI_SCLK);
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GPIO_setAnalogMode(GPIO_21, GPIO_ANALOG_DISABLED);
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GPIO_setPadConfig(GPIO_21, GPIO_PIN_TYPE_PULLUP);
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GPIO_setQualificationMode(GPIO_21, GPIO_QUAL_ASYNC);
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}
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/*===========================================================================
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* QSPI clock & controller initialization
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*===========================================================================*/
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static void qspi_clock_enable(void)
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{
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RCC_unlockRccRegister();
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RCC_enableQspiClock();
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RCC_resetQspiModule();
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RCC_releaseQspiModule();
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RCC_lockRccRegister();
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}
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static void qspi_controller_init(void)
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{
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QSPI_open(EXTENDED_SPI_PROTOCOL,
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HLCK_DIV_48,
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ADDRESS_3_BYTES,
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DEFAULT_DUMMY_CYCLE,
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HIGH_LVL_4_QSCK,
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FAST_READ_QUAD_IN_OUT);
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}
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/*===========================================================================
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* RT-Thread QSPI device interface
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*===========================================================================*/
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static struct rt_spi_bus qspi_bus;
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static struct rt_qspi_device qspi_dev;
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static struct rt_qspi_configuration qspi_cfg;
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static rt_err_t qspi_configure(struct rt_spi_device *device,
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struct rt_spi_configuration *cfg)
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{
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device->config = *cfg;
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return RT_EOK;
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}
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static rt_ssize_t qspi_xfer(struct rt_spi_device *device,
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struct rt_spi_message *message)
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{
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struct rt_qspi_message *qspi_msg = rt_container_of(message, struct rt_qspi_message, parent);
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uint8_t *send_buf = (uint8_t *)message->send_buf;
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uint8_t *recv_buf = (uint8_t *)message->recv_buf;
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uint32_t send_len = (send_buf != NULL) ? message->length : 0;
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uint32_t recv_len = (recv_buf != NULL) ? message->length : 0;
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/* Build command buffer (instruction + address + dummy) */
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uint8_t cmd_buf[260];
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uint8_t *ptr = cmd_buf;
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if (qspi_msg->instruction.content)
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*ptr++ = qspi_msg->instruction.content;
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if (qspi_msg->address.size)
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{
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uint32_t addr = qspi_msg->address.content;
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uint8_t addr_bytes = qspi_msg->address.size / 8;
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for (uint8_t i = addr_bytes; i > 0; i--)
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*ptr++ = (addr >> (8*(i-1))) & 0xFF;
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}
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if (qspi_msg->dummy_cycles)
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{
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uint8_t dummy_bytes = qspi_msg->dummy_cycles / 8;
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for (uint8_t i = 0; i < dummy_bytes; i++)
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*ptr++ = 0xFF;
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}
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uint32_t cmd_len = ptr - cmd_buf;
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/* Execute transfer using direct API */
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if (send_len && recv_len)
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{
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/* Half-duplex not supported in this driver */
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return 0;
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}
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if (send_len)
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{
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/* Append send data to command buffer */
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if (cmd_len + send_len <= sizeof(cmd_buf))
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{
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rt_memcpy(ptr, send_buf, send_len);
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QSPI_writeDirect(cmd_buf, cmd_len + send_len, 0);
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} else {
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/* Not enough buffer, split into two writes? Not needed for normal use */
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return 0;
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}
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} else if (recv_len)
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{
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/* Write command, keep CS active, then read data */
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QSPI_writeDirect(cmd_buf, cmd_len, 1);
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QSPI_readDirect(recv_buf, recv_len);
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} else {
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/* No data phase, just send command */
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QSPI_writeDirect(cmd_buf, cmd_len, 0);
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}
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return message->length;
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}
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static const struct rt_spi_ops qspi_ops = {
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.configure = qspi_configure,
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.xfer = qspi_xfer,
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};
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/*===========================================================================
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* Initialization
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*===========================================================================*/
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int rt_hw_qspi_init(void)
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{
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rt_kprintf("Initializing QSPI...\n");
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qspi_clock_enable();
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qspi_pin_init();
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qspi_controller_init();
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qspi_cfg.parent.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB;
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qspi_cfg.parent.max_hz = 25000000;
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qspi_cfg.parent.data_width = 8;
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qspi_cfg.medium_size = 0x1000000;
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qspi_cfg.ddr_mode = 0;
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qspi_cfg.qspi_dl_width = 0;
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rt_qspi_bus_register(&qspi_bus, "qspi0", &qspi_ops);
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qspi_dev.parent.bus = &qspi_bus;
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qspi_dev.parent.config = qspi_cfg.parent;
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qspi_dev.config = qspi_cfg;
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rt_spi_bus_attach_device(&qspi_dev.parent, "qspi_dev", "qspi0", NULL);
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_qspi_init);
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#endif
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‎bsp/novosns/ns800/libraries/HAL_Drivers/drivers/drv_qspi.h‎

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#ifndef __DRV_QSPI_H__
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#define __DRV_QSPI_H__
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#ifdef RT_USING_QSPI
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#include <rtthread.h>
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#include <rtdevice.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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int rt_hw_qspi_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __DRV_QSPI_H__ */
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‎bsp/novosns/ns800/ns800rt7p65-nssinepad/.ci/attachconfig/ci.attachconfig.yml‎

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@@ -6,9 +6,13 @@ devices.ecap:
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kconfig:
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- CONFIG_BSP_USING_ECAP=y
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- CONFIG_BSP_USING_ECAP1=y
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- CONFIG_BSP_USING_SPI=y
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- CONFIG_BSP_USING_SPI1=y
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devices.adc:
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<<: *scons
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kconfig:
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- CONFIG_BSP_USING_ADC=y
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- CONFIG_BSP_USING_ADC=y
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devices.spi:
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<<: *scons
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kconfig:
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- CONFIG_BSP_USING_SPI=y
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- CONFIG_BSP_USING_SPI1=y
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- CONFIG_BSP_USING_QSPI=y

‎bsp/novosns/ns800/ns800rt7p65-nssinepad/board/Kconfig‎

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@@ -205,5 +205,10 @@ menu "On-chip Peripheral Drivers"
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bool "Enable SPI4"
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default n
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endif
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menuconfig BSP_USING_QSPI
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bool "Enable QSPI"
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select RT_USING_QSPI
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default n
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endmenu

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