Project for the Electronics and Communications Systems course (MSc Computer Engineering @ University of Pisa).
The aim of the project was to design, simulate and synthesize an electronic cicuit which would generate convolutional codes from a given bit sequence.
The hardware description was written in VHDL, the simulation were carried out with Modelsim and the logical synthesis with Vivado.
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├── diagrams : draw.io diagrams used inside the report
├── src : VHDL source code
├── tb : VHDL testbenches
└── validation : C++ simulator of a convolutional code simulator