chore: remove SIMD LaneCount, SupportedLaneCount with upstream changes

Author: xangelix

roaring/src/bitmap/store/array_store/vector.rs

@@ -12,9 +12,7 @@
 
 use super::scalar;
 use core::simd::cmp::{SimdPartialEq, SimdPartialOrd};
-use core::simd::{
-    mask16x8, u16x8, u8x16, LaneCount, Mask, Simd, SimdElement, SupportedLaneCount, ToBytes,
-};
+use core::simd::{mask16x8, u16x8, u8x16, Mask, Select as _, Simd, SimdElement, ToBytes};
 
 // a one-pass SSE union algorithm
 pub fn or(lhs: &[u16], rhs: &[u16], visitor: &mut impl BinaryOperationVisitor) {
@@ -360,10 +358,7 @@ pub fn sub(lhs: &[u16], rhs: &[u16], visitor: &mut impl BinaryOperationVisitor)
 fn lanes_min_u16<const LANES: usize>(
     lhs: Simd<u16, LANES>,
     rhs: Simd<u16, LANES>,
-) -> Simd<u16, LANES>
-where
-    LaneCount<LANES>: SupportedLaneCount,
-{
+) -> Simd<u16, LANES> {
     lhs.simd_le(rhs).select(lhs, rhs)
 }
 
@@ -372,18 +367,14 @@ where
 fn lanes_max_u16<const LANES: usize>(
     lhs: Simd<u16, LANES>,
     rhs: Simd<u16, LANES>,
-) -> Simd<u16, LANES>
-where
-    LaneCount<LANES>: SupportedLaneCount,
-{
+) -> Simd<u16, LANES> {
     lhs.simd_gt(rhs).select(lhs, rhs)
 }
 
 #[inline]
 pub fn load<U, const LANES: usize>(src: &[U]) -> Simd<U, LANES>
 where
     U: SimdElement + PartialOrd,
-    LaneCount<LANES>: SupportedLaneCount,
 {
     debug_assert!(src.len() >= LANES);
     unsafe { load_unchecked(src) }
@@ -397,7 +388,6 @@ where
 pub unsafe fn load_unchecked<U, const LANES: usize>(src: &[U]) -> Simd<U, LANES>
 where
     U: SimdElement + PartialOrd,
-    LaneCount<LANES>: SupportedLaneCount,
 {
     unsafe { core::ptr::read_unaligned(src as *const _ as *const Simd<U, LANES>) }
 }
@@ -407,7 +397,6 @@ where
 pub fn store<U, const LANES: usize>(v: Simd<U, LANES>, out: &mut [U])
 where
     U: SimdElement + PartialOrd,
-    LaneCount<LANES>: SupportedLaneCount,
 {
     debug_assert!(out.len() >= LANES);
     unsafe {
@@ -423,7 +412,6 @@ where
 unsafe fn store_unchecked<U, const LANES: usize>(v: Simd<U, LANES>, out: &mut [U])
 where
     U: SimdElement + PartialOrd,
-    LaneCount<LANES>: SupportedLaneCount,
 {
     unsafe { core::ptr::write_unaligned(out as *mut _ as *mut Simd<U, LANES>, v) }
 }