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14 | 14 | #include <linux/phy/phy.h> |
15 | 15 | #include <linux/bitfield.h> |
16 | 16 |
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| 17 | +#include "../../pci.h" |
| 18 | + |
17 | 19 | /* High Performance Architecture (HPA) PCIe controller registers */ |
18 | 20 | #define CDNS_PCIE_HPA_IP_REG_BANK 0x01000000 |
19 | 21 | #define CDNS_PCIE_HPA_IP_CFG_CTRL_REG_BANK 0x01003C00 |
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119 | 121 | #define CDNS_PCIE_HPA_AT_OB_REGION_DESC0(r) (0x1008 + ((r) & 0x1F) * 0x0080) |
120 | 122 | #define CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK GENMASK(28, 24) |
121 | 123 | #define CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MEM \ |
122 | | - FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x0) |
| 124 | + FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, PCIE_TLP_TYPE_MEM_RDWR) |
123 | 125 | #define CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_IO \ |
124 | | - FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x2) |
| 126 | + FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, PCIE_TLP_TYPE_IO_RDWR) |
125 | 127 | #define CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_CONF_TYPE0 \ |
126 | | - FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x4) |
| 128 | + FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, PCIE_TLP_TYPE_CFG0_RDWR) |
127 | 129 | #define CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_CONF_TYPE1 \ |
128 | | - FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x5) |
| 130 | + FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, PCIE_TLP_TYPE_CFG1_RDWR) |
129 | 131 | #define CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_NORMAL_MSG \ |
130 | | - FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x10) |
| 132 | + FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, PCIE_TLP_TYPE_MSG) |
131 | 133 |
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132 | 134 | /* Region r Outbound PCIe Descriptor Register */ |
133 | 135 | #define CDNS_PCIE_HPA_AT_OB_REGION_DESC1(r) (0x100C + ((r) & 0x1F) * 0x0080) |
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