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8384284: [REDO] C2: Deep recursion with cmovP_regNode::bottom_type
Reviewed-by: mdoerr, dlong
1 parent d99c8b3 commit 1051631

9 files changed

Lines changed: 255 additions & 288 deletions

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‎src/hotspot/cpu/ppc/ppc.ad‎

Lines changed: 21 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1337,7 +1337,7 @@ int ConstantTable::calculate_table_base_offset() const {
13371337

13381338
bool MachConstantBaseNode::requires_postalloc_expand() const { return true; }
13391339
void MachConstantBaseNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {
1340-
iRegPdstOper *op_dst = new iRegPdstOper();
1340+
iRegLdstOper *op_dst = new iRegLdstOper();
13411341
MachNode *m1 = new loadToc_hiNode();
13421342
MachNode *m2 = new loadToc_loNode();
13431343

@@ -2543,7 +2543,7 @@ loadConLNodesTuple loadConLNodesTuple_create(PhaseRegAlloc *ra_, Node *toc, immL
25432543
// operands for new nodes
25442544
m1->_opnds[0] = new iRegLdstOper(); // dst
25452545
m1->_opnds[1] = immSrc; // src
2546-
m1->_opnds[2] = new iRegPdstOper(); // toc
2546+
m1->_opnds[2] = new iRegLdstOper(); // toc
25472547
m2->_opnds[0] = new iRegLdstOper(); // dst
25482548
m2->_opnds[1] = immSrc; // src
25492549
m2->_opnds[2] = new iRegLdstOper(); // base
@@ -2574,7 +2574,7 @@ loadConLNodesTuple loadConLNodesTuple_create(PhaseRegAlloc *ra_, Node *toc, immL
25742574
// operands for new nodes
25752575
m2->_opnds[0] = new iRegLdstOper(); // dst
25762576
m2->_opnds[1] = immSrc; // src
2577-
m2->_opnds[2] = new iRegPdstOper(); // toc
2577+
m2->_opnds[2] = new iRegLdstOper(); // toc
25782578

25792579
// Initialize ins_attrib instruction offset.
25802580
m2->_cbuf_insts_offset = -1;
@@ -2625,7 +2625,7 @@ loadConLReplicatedNodesTuple loadConLReplicatedNodesTuple_create(Compile *C, Pha
26252625
// operands for new nodes
26262626
m1->_opnds[0] = new iRegLdstOper(); // dst
26272627
m1->_opnds[1] = immSrc; // src
2628-
m1->_opnds[2] = new iRegPdstOper(); // toc
2628+
m1->_opnds[2] = new iRegLdstOper(); // toc
26292629

26302630
m2->_opnds[0] = new iRegLdstOper(); // dst
26312631
m2->_opnds[1] = immSrc; // src
@@ -2671,7 +2671,7 @@ loadConLReplicatedNodesTuple loadConLReplicatedNodesTuple_create(Compile *C, Pha
26712671
// operands for new nodes
26722672
m2->_opnds[0] = new iRegLdstOper(); // dst
26732673
m2->_opnds[1] = immSrc; // src
2674-
m2->_opnds[2] = new iRegPdstOper(); // toc
2674+
m2->_opnds[2] = new iRegLdstOper(); // toc
26752675

26762676
m3->_opnds[0] = new vecXOper(); // dst
26772677
m3->_opnds[1] = new iRegLdstOper(); // src
@@ -2799,14 +2799,20 @@ encode %{
27992799
loadConP_hiNode *m1 = new loadConP_hiNode();
28002800
loadConP_loNode *m2 = new loadConP_loNode();
28012801

2802+
// If this is an oop, both m1 and m2 must be consider oops so postalloc scheduling does not
2803+
// put a safepoint between them
2804+
m1->_bottom_type = bottom_type();
2805+
m2->_bottom_type = bottom_type();
2806+
28022807
// inputs for new nodes
28032808
m1->add_req(nullptr, n_toc);
28042809
m2->add_req(nullptr, m1);
28052810

28062811
// operands for new nodes
28072812
m1->_opnds[0] = new iRegPdstOper(); // dst
28082813
m1->_opnds[1] = op_src; // src
2809-
m1->_opnds[2] = new iRegPdstOper(); // toc
2814+
m1->_opnds[2] = new iRegLdstOper(); // toc
2815+
28102816
m2->_opnds[0] = new iRegPdstOper(); // dst
28112817
m2->_opnds[1] = op_src; // src
28122818
m2->_opnds[2] = new iRegLdstOper(); // base
@@ -2831,7 +2837,7 @@ encode %{
28312837
// operands for new nodes
28322838
m2->_opnds[0] = new iRegPdstOper(); // dst
28332839
m2->_opnds[1] = op_src; // src
2834-
m2->_opnds[2] = new iRegPdstOper(); // toc
2840+
m2->_opnds[2] = new iRegLdstOper(); // toc
28352841

28362842
// Register allocation for new nodes.
28372843
ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
@@ -2858,7 +2864,7 @@ encode %{
28582864
// operands for new nodes
28592865
m2->_opnds[0] = op_dst;
28602866
m2->_opnds[1] = op_src;
2861-
m2->_opnds[2] = new iRegPdstOper(); // constanttablebase
2867+
m2->_opnds[2] = new iRegLdstOper(); // constanttablebase
28622868

28632869
// register allocation for new nodes
28642870
ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
@@ -2882,7 +2888,7 @@ encode %{
28822888
// operands for new nodes
28832889
m2->_opnds[0] = op_dst;
28842890
m2->_opnds[1] = op_src;
2885-
m2->_opnds[2] = new iRegPdstOper(); // constanttablebase
2891+
m2->_opnds[2] = new iRegLdstOper(); // constanttablebase
28862892

28872893
// register allocation for new nodes
28882894
ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
@@ -5731,6 +5737,9 @@ instruct loadConN_Ex(iRegNdst dst, immN src) %{
57315737
MachNode *m1 = new loadConN_hiNode();
57325738
MachNode *m2 = new loadConN_loNode();
57335739
MachNode *m3 = new clearMs32bNode();
5740+
m1->_bottom_type = bottom_type();
5741+
m2->_bottom_type = bottom_type();
5742+
m3->_bottom_type = bottom_type();
57345743
m1->add_req(nullptr);
57355744
m2->add_req(nullptr, m1);
57365745
m3->add_req(nullptr, m2);
@@ -5809,6 +5818,7 @@ instruct loadConNKlass_Ex(iRegNdst dst, immNKlass src) %{
58095818
postalloc_expand %{
58105819
// Load high bits into register. Sign extended.
58115820
MachNode *m1 = new loadConNKlass_hiNode();
5821+
m1->_bottom_type = bottom_type();
58125822
m1->add_req(nullptr);
58135823
m1->_opnds[0] = op_dst;
58145824
m1->_opnds[1] = op_src;
@@ -5819,6 +5829,7 @@ instruct loadConNKlass_Ex(iRegNdst dst, immNKlass src) %{
58195829
if (!Assembler::is_uimm((jlong)CompressedKlassPointers::encode((Klass *)op_src->constant()), 31)) {
58205830
// Value might be 1-extended. Mask out these bits.
58215831
m2 = new loadConNKlass_maskNode();
5832+
m2->_bottom_type = bottom_type();
58225833
m2->add_req(nullptr, m1);
58235834
m2->_opnds[0] = op_dst;
58245835
m2->_opnds[1] = op_src;
@@ -5828,6 +5839,7 @@ instruct loadConNKlass_Ex(iRegNdst dst, immNKlass src) %{
58285839
}
58295840

58305841
MachNode *m3 = new loadConNKlass_loNode();
5842+
m3->_bottom_type = bottom_type();
58315843
m3->add_req(nullptr, m2);
58325844
m3->_opnds[0] = op_dst;
58335845
m3->_opnds[1] = op_src;

‎src/hotspot/share/adlc/formssel.cpp‎

Lines changed: 0 additions & 108 deletions
Original file line numberDiff line numberDiff line change
@@ -453,14 +453,6 @@ Form::DataType InstructForm::is_ideal_store() const {
453453
return _matrule->is_ideal_store();
454454
}
455455

456-
// Return 'true' if this instruction matches an ideal vector node
457-
bool InstructForm::is_vector() const {
458-
if( _matrule == nullptr ) return false;
459-
460-
return _matrule->is_vector();
461-
}
462-
463-
464456
// Return the input register that must match the output register
465457
// If this is not required, return 0
466458
uint InstructForm::two_address(FormDict &globals) {
@@ -767,51 +759,6 @@ int InstructForm::memory_operand(FormDict &globals) const {
767759
return NO_MEMORY_OPERAND;
768760
}
769761

770-
// This instruction captures the machine-independent bottom_type
771-
// Expected use is for pointer vs oop determination for LoadP
772-
bool InstructForm::captures_bottom_type(FormDict &globals) const {
773-
if (_matrule && _matrule->_rChild &&
774-
(!strcmp(_matrule->_rChild->_opType,"CastPP") || // new result type
775-
!strcmp(_matrule->_rChild->_opType,"CastDD") ||
776-
!strcmp(_matrule->_rChild->_opType,"CastFF") ||
777-
!strcmp(_matrule->_rChild->_opType,"CastII") ||
778-
!strcmp(_matrule->_rChild->_opType,"CastLL") ||
779-
!strcmp(_matrule->_rChild->_opType,"CastVV") ||
780-
!strcmp(_matrule->_rChild->_opType,"CastX2P") || // new result type
781-
!strcmp(_matrule->_rChild->_opType,"DecodeN") ||
782-
!strcmp(_matrule->_rChild->_opType,"EncodeP") ||
783-
!strcmp(_matrule->_rChild->_opType,"DecodeNKlass") ||
784-
!strcmp(_matrule->_rChild->_opType,"EncodePKlass") ||
785-
!strcmp(_matrule->_rChild->_opType,"LoadN") ||
786-
!strcmp(_matrule->_rChild->_opType,"LoadNKlass") ||
787-
!strcmp(_matrule->_rChild->_opType,"CreateEx") || // type of exception
788-
!strcmp(_matrule->_rChild->_opType,"CheckCastPP") ||
789-
!strcmp(_matrule->_rChild->_opType,"GetAndSetP") ||
790-
!strcmp(_matrule->_rChild->_opType,"GetAndSetN") ||
791-
!strcmp(_matrule->_rChild->_opType,"RotateLeft") ||
792-
!strcmp(_matrule->_rChild->_opType,"RotateRight") ||
793-
#if INCLUDE_SHENANDOAHGC
794-
!strcmp(_matrule->_rChild->_opType,"ShenandoahCompareAndExchangeP") ||
795-
!strcmp(_matrule->_rChild->_opType,"ShenandoahCompareAndExchangeN") ||
796-
#endif
797-
!strcmp(_matrule->_rChild->_opType,"StrInflatedCopy") ||
798-
!strcmp(_matrule->_rChild->_opType,"VectorCmpMasked")||
799-
!strcmp(_matrule->_rChild->_opType,"VectorMaskGen")||
800-
!strcmp(_matrule->_rChild->_opType,"VerifyVectorAlignment")||
801-
!strcmp(_matrule->_rChild->_opType,"CompareAndExchangeP") ||
802-
!strcmp(_matrule->_rChild->_opType,"CompareAndExchangeN"))) return true;
803-
else if ( is_ideal_load() == Form::idealP ) return true;
804-
else if ( is_ideal_store() != Form::none ) return true;
805-
806-
if (needs_base_oop_edge(globals)) return true;
807-
808-
if (is_vector()) return true;
809-
if (is_mach_constant()) return true;
810-
811-
return false;
812-
}
813-
814-
815762
// Access instr_cost attribute or return null.
816763
const char* InstructForm::cost() {
817764
for (Attribute* cur = _attribs; cur != nullptr; cur = (Attribute*)cur->_next) {
@@ -1181,9 +1128,6 @@ const char *InstructForm::mach_base_class(FormDict &globals) const {
11811128
}
11821129
else if (is_mach_constant()) {
11831130
return "MachConstantNode";
1184-
}
1185-
else if (captures_bottom_type(globals)) {
1186-
return "MachTypeNode";
11871131
} else {
11881132
return "MachNode";
11891133
}
@@ -4337,58 +4281,6 @@ Form::DataType MatchRule::is_ideal_load() const {
43374281
return ideal_load;
43384282
}
43394283

4340-
bool MatchRule::is_vector() const {
4341-
static const char *vector_list[] = {
4342-
"AddVB","AddVS","AddVI","AddVL","AddVHF","AddVF","AddVD",
4343-
"SubVB","SubVS","SubVI","SubVL","SubVHF","SubVF","SubVD",
4344-
"MulVB","MulVS","MulVI","MulVL","MulVHF","MulVF","MulVD",
4345-
"DivVHF","DivVF","DivVD",
4346-
"AbsVB","AbsVS","AbsVI","AbsVL","AbsVF","AbsVD",
4347-
"NegVF","NegVD","NegVI","NegVL",
4348-
"SqrtVD","SqrtVF","SqrtVHF",
4349-
"AndV" ,"XorV" ,"OrV",
4350-
"MaxV", "MinV", "MinVHF", "MaxVHF", "UMinV", "UMaxV",
4351-
"CompressV", "ExpandV", "CompressM", "CompressBitsV", "ExpandBitsV",
4352-
"AddReductionVI", "AddReductionVL",
4353-
"AddReductionVHF", "AddReductionVF", "AddReductionVD",
4354-
"MulReductionVI", "MulReductionVL",
4355-
"MulReductionVHF", "MulReductionVF", "MulReductionVD",
4356-
"MaxReductionV", "MinReductionV",
4357-
"AndReductionV", "OrReductionV", "XorReductionV",
4358-
"MulAddVS2VI", "MacroLogicV",
4359-
"LShiftCntV","RShiftCntV",
4360-
"LShiftVB","LShiftVS","LShiftVI","LShiftVL",
4361-
"RShiftVB","RShiftVS","RShiftVI","RShiftVL",
4362-
"URShiftVB","URShiftVS","URShiftVI","URShiftVL",
4363-
"Replicate","ReverseV","ReverseBytesV",
4364-
"RoundDoubleModeV","RotateLeftV" , "RotateRightV", "LoadVector","StoreVector",
4365-
"LoadVectorGather", "StoreVectorScatter", "LoadVectorGatherMasked", "StoreVectorScatterMasked",
4366-
"SelectFromTwoVector", "VectorTest", "VectorLoadMask", "VectorStoreMask", "VectorBlend", "VectorInsert",
4367-
"VectorRearrange", "VectorLoadShuffle", "VectorLoadConst",
4368-
"VectorCastB2X", "VectorCastS2X", "VectorCastI2X",
4369-
"VectorCastL2X", "VectorCastF2X", "VectorCastD2X", "VectorCastF2HF", "VectorCastHF2F",
4370-
"VectorUCastB2X", "VectorUCastS2X", "VectorUCastI2X",
4371-
"VectorMaskWrapper","VectorMaskCmp","VectorReinterpret","LoadVectorMasked","StoreVectorMasked",
4372-
"FmaVD", "FmaVF", "FmaVHF", "PopCountVI", "PopCountVL", "PopulateIndex", "VectorLongToMask",
4373-
"CountLeadingZerosV", "CountTrailingZerosV", "SignumVF", "SignumVD", "SaturatingAddV", "SaturatingSubV",
4374-
// Next are vector mask ops.
4375-
"MaskAll", "AndVMask", "OrVMask", "XorVMask", "VectorMaskCast",
4376-
"RoundVF", "RoundVD",
4377-
// Next are not supported currently.
4378-
"PackB","PackS","PackI","PackL","PackF","PackD","Pack2L","Pack2D",
4379-
"ExtractB","ExtractUB","ExtractC","ExtractS","ExtractI","ExtractL","ExtractF","ExtractD"
4380-
};
4381-
int cnt = sizeof(vector_list)/sizeof(char*);
4382-
if (_rChild) {
4383-
const char *opType = _rChild->_opType;
4384-
for (int i=0; i<cnt; i++)
4385-
if (strcmp(opType,vector_list[i]) == 0)
4386-
return true;
4387-
}
4388-
return false;
4389-
}
4390-
4391-
43924284
bool MatchRule::skip_antidep_check() const {
43934285
// Some loads operate on what is effectively immutable memory so we
43944286
// should skip the anti dep computations. For some of these nodes

‎src/hotspot/share/adlc/formssel.hpp‎

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 1998, 2025, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 1998, 2026, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -169,7 +169,6 @@ class InstructForm : public Form {
169169
virtual bool is_ideal_safepoint() const; // node matches 'SafePoint'
170170
virtual bool is_ideal_nop() const; // node matches 'Nop'
171171
virtual bool is_ideal_control() const; // control node
172-
virtual bool is_vector() const; // vector instruction
173172

174173
virtual Form::CallType is_ideal_call() const; // matches ideal 'Call'
175174
virtual Form::DataType is_ideal_load() const; // node matches ideal 'LoadXNode'
@@ -199,11 +198,6 @@ class InstructForm : public Form {
199198
MANY_MEMORY_OPERANDS = 999999
200199
};
201200

202-
203-
// This instruction captures the machine-independent bottom_type
204-
// Expected use is for pointer vs oop determination for LoadP
205-
virtual bool captures_bottom_type(FormDict& globals) const;
206-
207201
virtual const char *cost(); // Access ins_cost attribute
208202
virtual uint num_opnds(); // Count of num_opnds for MachNode class
209203
// Counts USE_DEF opnds twice. See also num_unique_opnds().
@@ -1065,7 +1059,6 @@ class MatchRule : public MatchNode {
10651059
bool is_ideal_goto() const; // node matches ideal 'Goto'
10661060
bool is_ideal_loopEnd() const; // node matches ideal 'LoopEnd'
10671061
bool is_ideal_bool() const; // node matches ideal 'Bool'
1068-
bool is_vector() const; // vector instruction
10691062
Form::DataType is_ideal_load() const;// node matches ideal 'LoadXNode'
10701063
// Should antidep checks be disabled for this rule
10711064
// See definition of MatchRule::skip_antidep_check

‎src/hotspot/share/adlc/output_c.cpp‎

Lines changed: 17 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1324,11 +1324,8 @@ static void generate_peepreplace( FILE *fp, FormDict &globals, int peephole_numb
13241324
fprintf(fp, " root->add_req(inst%d->in(%d)); // unmatched ideal edge\n",
13251325
inst_num, unmatched_edge);
13261326
}
1327-
// If new instruction captures bottom type
1328-
if( root_form->captures_bottom_type(globals) ) {
1329-
// Get bottom type from instruction whose result we are replacing
1330-
fprintf(fp, " root->_bottom_type = inst%d->bottom_type();\n", inst_num);
1331-
}
1327+
// Get bottom type from instruction whose result we are replacing
1328+
fprintf(fp, " root->_bottom_type = inst%d->bottom_type();\n", inst_num);
13321329
// Define result register and result operand
13331330
fprintf(fp, " ra_->set_oop (root, ra_->is_oop(inst%d));\n", inst_num);
13341331
fprintf(fp, " ra_->set_pair(root->_idx, ra_->get_reg_second(inst%d), ra_->get_reg_first(inst%d));\n", inst_num, inst_num);
@@ -1587,12 +1584,6 @@ void ArchDesc::defineExpand(FILE *fp, InstructForm *node) {
15871584
fprintf(fp, " ((MachIfNode*)n%d)->_fcnt = _fcnt;\n", cnt);
15881585
}
15891586

1590-
// Fill in the bottom_type where requested
1591-
if (node->captures_bottom_type(_globalNames) &&
1592-
new_inst->captures_bottom_type(_globalNames)) {
1593-
fprintf(fp, " ((MachTypeNode*)n%d)->_bottom_type = bottom_type();\n", cnt);
1594-
}
1595-
15961587
const char *resultOper = new_inst->reduce_result();
15971588
fprintf(fp," n%d->set_opnd_array(0, state->MachOperGenerator(%s));\n",
15981589
cnt, machOperEnum(resultOper));
@@ -1856,6 +1847,8 @@ void ArchDesc::defineExpand(FILE *fp, InstructForm *node) {
18561847

18571848
fprintf(fp, "\n");
18581849
if (node->expands()) {
1850+
// Fill in the bottom_type, only for result
1851+
fprintf(fp, " result->_bottom_type = bottom_type();\n");
18591852
fprintf(fp, " return result;\n");
18601853
} else {
18611854
fprintf(fp, " return this;\n");
@@ -3965,13 +3958,15 @@ void ArchDesc::buildMachNode(FILE *fp_cpp, InstructForm *inst, const char *inden
39653958
}
39663959
}
39673960

3968-
// Fill in the bottom_type where requested
3969-
if (inst->captures_bottom_type(_globalNames)) {
3970-
if (strncmp("MachCall", inst->mach_base_class(_globalNames), strlen("MachCall")) != 0
3971-
&& strncmp("MachIf", inst->mach_base_class(_globalNames), strlen("MachIf")) != 0) {
3972-
fprintf(fp_cpp, "%s node->_bottom_type = _leaf->bottom_type();\n", indent);
3973-
}
3961+
// Fill in the bottom_type
3962+
if (inst->_matrule != nullptr && strcmp(inst->_matrule->_opType, "PrefetchAllocation") == 0) {
3963+
// Special case, with AllocatePrefetchStyle == 3, this should be Type::MEMORY, but the graph
3964+
// seems unsound, needs further investigation
3965+
fprintf(fp_cpp, "%s node->_bottom_type = Type::ABIO;\n", indent);
3966+
} else {
3967+
fprintf(fp_cpp, "%s node->_bottom_type = _leaf->bottom_type();\n", indent);
39743968
}
3969+
39753970
if( inst->is_ideal_if() ) {
39763971
fprintf(fp_cpp, "%s node->_prob = _leaf->as_If()->_prob;\n", indent);
39773972
fprintf(fp_cpp, "%s node->_fcnt = _leaf->as_If()->_fcnt;\n", indent);
@@ -4026,10 +4021,8 @@ void InstructForm::define_cisc_version(ArchDesc& AD, FILE* fp_cpp) {
40264021
fprintf(fp_cpp, "MachNode *%sNode::cisc_version(int offset) {\n", this->_ident);
40274022
// Create the MachNode object
40284023
fprintf(fp_cpp, " %sNode *node = new %sNode();\n", name, name);
4029-
// Fill in the bottom_type where requested
4030-
if ( this->captures_bottom_type(AD.globalNames()) ) {
4031-
fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n");
4032-
}
4024+
// Fill in the bottom_type
4025+
fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n");
40334026

40344027
uint cur_num_opnds = num_opnds();
40354028
if (cur_num_opnds > 1 && cur_num_opnds != num_unique_opnds()) {
@@ -4075,10 +4068,9 @@ void InstructForm::define_short_branch_methods(ArchDesc& AD, FILE* fp_cpp) {
40754068
fprintf(fp_cpp, " node->_prob = _prob;\n");
40764069
fprintf(fp_cpp, " node->_fcnt = _fcnt;\n");
40774070
}
4078-
// Fill in the bottom_type where requested
4079-
if ( this->captures_bottom_type(AD.globalNames()) ) {
4080-
fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n");
4081-
}
4071+
4072+
// Fill in the bottom_type
4073+
fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n");
40824074

40834075
fprintf(fp_cpp, "\n");
40844076
// Short branch version must use same node index for access

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