-
Notifications
You must be signed in to change notification settings - Fork 2
Expand file tree
/
Copy pathbackend_default_globalLog.log
More file actions
1452 lines (1397 loc) · 240 KB
/
backend_default_globalLog.log
File metadata and controls
1452 lines (1397 loc) · 240 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
View: Clock
System compilation
Clock path analysis
For the clock path analysis in Verdi, please use the following commands in the additional command file of zTopBuild :
- enable ztime_uses_rtl_names
- enable rtl_names_save_all
Clock localization
Only one partition, no clock localization will be performed
zCore Compilation : Part_0
Clock localization
Strategy 1 - full replication strategy has been chosen.
IO cut
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
| | U0.M0.F00 | U0.M0.F01 | U0.M0.F02 | U0.M0.F03 | U0.M0.F04 | U0.M0.F05 | U0.M0.F08 | U0.M0.F11 | Core Interface |
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
| U0.M0.F00 | - | 0 (0)| 0 (0)| 313 (0)| 0 (0)| 0 (0)| 0 (0)| 0 (0)| 0 (0)|
| U0.M0.F01 | 0 (0)| - | 258 (0)| 17 (-1)| 1042 (0)| 35 (0)| 96 (0)| 71 (-11)| 0 (0)|
| U0.M0.F02 | 0 (0)| 2 (0)| - | 812 (0)| 2 (0)| 2 (0)| 1 (0)| 1 (0)| 0 (0)|
| U0.M0.F03 | 1044 (7)| 1327 (6)| 873 (6)| - | 286 (6)| 256 (4)| 43 (5)| 253 (7)| 0 (0)|
| U0.M0.F04 | 0 (0)| 12 (0)| 258 (0)| 1 (0)| - | 1044 (0)| 37 (0)| 1 (0)| 0 (0)|
| U0.M0.F05 | 0 (0)| 1 (-1)| 258 (-1)| 3 (-1)| 10 (-1)| - | 1 (0)| 1042 (-1)| 0 (0)|
| U0.M0.F08 | 0 (-2)| 1 (-2)| 129 (0)| 3 (-2)| 0 (-2)| 0 (-2)| - | 10 (-1)| 0 (0)|
| U0.M0.F11 | 0 (0)| 3 (0)| 129 (0)| 0 (0)| 1 (0)| 139 (0)| 1150 (0)| - | 0 (0)|
| Core Interface | 3 (3)| 3 (3)| 3 (3)| 0 (0)| 3 (3)| 3 (3)| 3 (3)| 3 (3)| - |
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
| Fanout | L: 1360 D: 0 | L: 2868 D: 0 | L: 2728 D: 0 | L: 5231 D: 0 | L: 2697 D: 0 | L: 2794 D: 0 | L: 1474 D: 0 | L: 2803 D: 0 | L: 21 D: 0 |
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
| Delta of Fanout| L: +8 D: 0 | L: -6 D: 0 | L: +8 D: 0 | L: +37 D: 0 | L: +6 D: 0 | L: 0 D: 0 | L: -3 D: 0 | L: -3 D: 0 | L: +21 D: 0 |
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
| NBPORT | L: 1360 D: 0 | L: 2869 D: 0 | L: 2728 D: 0 | L: 5192 D: 0 | L: 2697 D: 0 | L: 2798 D: 0 | L: 1483 D: 0 | L: 2803 D: 0 | L: 0 D: 0 |
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
| Delta of NBPORT| L: +8 D: 0 | L: -5 D: 0 | L: +8 D: 0 | L: -2 D: 0 | L: +6 D: 0 | L: +4 D: 0 | L: +6 D: 0 | L: -3 D: 0 | L: 0 D: 0 |
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
| AVERAGE | L: 1360 D: 0 | L: 2868 D: 0 | L: 2728 D: 0 | L: 5211 D: 0 | L: 2697 D: 0 | L: 2796 D: 0 | L: 1478 D: 0 | L: 2803 D: 0 | L: 10 D: 0 |
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
|Delta of AVERAGE| L: +8 D: 0 | L: -6 D: 0 | L: +8 D: 0 | L: +17 D: 0 | L: +6 D: 0 | L: +2 D: 0 | L: +1 D: 0 | L: -3 D: 0 | L: +10 D: 0 |
+----------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+
Resources estimation
+-----------+---------+----------+---------+----------+
| PART NAME | REG | DIFF REG | LUT | DIFF LUT |
+-----------+---------+----------+---------+----------+
| U0.M0.F00 | 119058 | +20 | 553492 | +10 |
| U0.M0.F01 | 291081 | +20 | 866475 | +10 |
| U0.M0.F02 | 76620 | +28 | 306089 | +14 |
| U0.M0.F03 | 366271 | +8 | 563013 | +5 |
| U0.M0.F04 | 293803 | +24 | 867895 | +12 |
| U0.M0.F05 | 159886 | +34 | 447400 | +18 |
| U0.M0.F08 | 143647 | +20 | 432448 | +10 |
| U0.M0.F11 | 289467 | +40 | 865744 | +23 |
+-----------+---------+----------+---------+----------+
Longest path passes through 1 inter-partition nets, cost 3072.03
View: Compile profile
BETA version: results may not be fully accurate
Critical Path
Columns:
- waiting for slot : the time waiting for a slot on the grid
- waiting to be spawned : the time between the task is spawed and the task is launched
- execution : the time for the task being executed
- release : the time between the task finishes and it is released from the grid
- spawn time : the time the task was spawn on the grid, taking as reference time the spawn time of the first task in the critical path
- finish time : the time the task finishes, taking as reference time the spawn time of the first task in the critical path
- machine name : the machine where the task was launched. It appears only for tasks external to zCui
^TABLE(tools/zCui/globalProfilerTable.xml,critical_path,DHHHHHHD)Critical Path Table^TABLE-
Ideal Critical Path
Columns:
- contribution : the elapsed time for this task during the ideal critical path
- execution : the total time for the task being executed
- machine name : the machine where the task was launched. It appears only for tasks external to zCui
- percentage : the percentage of execution time
^TABLE(tools/zCui/globalProfilerTable.xml,ideal_critical_path,DHHD)Ideal Critical Path Table^TABLE-
Execution Time (critical path)
^PIECHART(tools/zCui/globalProfilerTable.xml,exec_time_piechart)Execution Time (critical path)^PIECHART-
Execution Time (ideal critical path)
^PIECHART(tools/zCui/globalProfilerTable.xml,exec_time_piechart_ideal)Execution Time (ideal critical path)^PIECHART-
Main Compilation Stages
Columns:
- elapsed time : the duration of the stage (in seconds) including scheduling and grid delays
- execution time : the duration of the effective execution of the stage (in seconds)
Front End Stages Timing
Columns :
- elapsed time : the time for the task being spawed and released
- execution time : the time for the task being executed
^TABLE(tools/zCui/globalProfilerTable.xml,front_end_stages,DHH)Front End Stages^TABLE-
Back-end Stages
Back End Stages Timing for backend_default
Columns :
- elapsed time : the time for the task being spawed and released
- execution time : the time for the task being executed
^TABLE(tools/zCui/globalProfilerTable.xml,back_end_stages,DHH)Back-end Stages^TABLE-
Top 5 zCore
^TABLE(tools/zCui/globalProfilerTable.xml,top_five_zcore,DDD)Top 5 zCore^TABLE-
Top 10 FPGAs
^TABLE(tools/zCui/globalProfilerTable.xml,top_ten_fpga,DDD)Top 10 FPGAs^TABLE-
FPGA compilation
Duration per compilation step for each FPGA
^TABLE(tools/zCui/globalProfilerTable.xml,fpga_compilation,TTTTTTTTTTTTTTTTTTT)Durations^TABLE-
Annex:
step 0: FPGA
step 1: ZNETGEN
step 2: VIVADO
step 3: NETLIST_ANALYSIS_PREPROCESSING
step 4: READ_CONSTRAINTS
step 5: OPT_DESIGN
step 6: POST_OPT_NETLIST_ANALYS_PROCESSING
step 7: PLACE_DESIGN
step 8: ROUTE_DESIGN
step 9: POST_ROUTE_PHYS_OPT_DESIGN
step 10: ROUTE_DESIGN_HOLD
step 11: TIMING
step 12: DRC_BITSTREAM_CHECK
step 13: WRITE_BITSTREAM
step 14: LOCATION_BUILDING
step 15: ZPARSEBITSTREAM
step 16: ZRDB
step 17: ZDB
step 18: total
Hosts
No profiling data available. To have acces to this data you should activate profiling
Grid Delay
There are no tasks with grid delay > 30s
Compile Times
^TABLE(tools/zCui/globalProfilerTable.xml,compileTimes,DTTT)Times^TABLE-
Compile times
^TABLE(tools/zMetrics/zCui_compiletimes_metrics.xml,compile_times,DTTT)Compile times^TABLE
FPGA compilation
Duration per compilation step for each FPGA
^TABLE(tools/zMetrics/zCui_pnrsteps_metrics.xml,pnr_steps,DTTTTTTTTTTTTTTTTTT)Place & Route steps^TABLE
View: Design
Synthesis
Top 10 (ordered by reg)
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| reg | lut | bram | uram | memsize | m18x18 | bufg | buft | nbI/O | nbBB | nbZV | nbME | dsp48 | name|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 32782 | 8268 | 0 | 0 | 0 | 0 | 0 | 0 | 2064 | 1024 | 0 | 0 | 0 | sdma_data_fifo_16x1024|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 26700 | 1512 | 0 | 0 | 0 | 0 | 0 | 0 | 4728 | 0 | 0 | 0 | 0 | axi_delay_ctrl_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 8232 | 29 | 0 | 0 | 0 | 0 | 0 | 0 | 2060 | 1027 | 0 | 0 | 0 | fifo_8x1027|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 8192 | 14774 | 0 | 0 | 0 | 0 | 0 | 0 | 534 | 1536 | 0 | 0 | 0 | syn_fifo_32x256|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 6147 | 6164 | 0 | 0 | 0 | 0 | 0 | 0 | 4619 | 32 | 0 | 0 | 0 | param_gen_self_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 4887 | 3267 | 0 | 0 | 0 | 0 | 0 | 0 | 4915 | 128 | 0 | 0 | 0 | reg_ctrl_apb_clk_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 4799 | 22313 | 0 | 0 | 0 | 0 | 0 | 0 | 4579 | 3196 | 0 | 0 | 0 | sdma_sync_out_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 4402 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 2378 | 76 | 0 | 0 | 0 | pe_array|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 4117 | 5176 | 0 | 0 | 0 | 0 | 0 | 0 | 2099 | 0 | 0 | 0 | 0 | pre_cal_data_distr|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 4110 | 1091 | 0 | 0 | 0 | 0 | 0 | 0 | 264 | 128 | 0 | 0 | 0 | sdma_wstrb_fifo_16x128|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
Top 10 (ordered by lut)
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| reg | lut | bram | uram | memsize | m18x18 | bufg | buft | nbI/O | nbBB | nbZV | nbME | dsp48 | name|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 1028 | 24621 | 0 | 0 | 0 | 0 | 0 | 0 | 5648 | 0 | 0 | 0 | 0 | pew_inst_ctrl_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 4799 | 22313 | 0 | 0 | 0 | 0 | 0 | 0 | 4579 | 3196 | 0 | 0 | 0 | sdma_sync_out_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 2640 | 18502 | 0 | 0 | 0 | 0 | 0 | 0 | 1863 | 3194 | 0 | 0 | 0 | store_out|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 8192 | 14774 | 0 | 0 | 0 | 0 | 0 | 0 | 534 | 1536 | 0 | 0 | 0 | syn_fifo_32x256|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 2842 | 8336 | 0 | 0 | 0 | 0 | 0 | 0 | 5026 | 22 | 0 | 0 | 0 | per_inst_cfg|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 32782 | 8268 | 0 | 0 | 0 | 0 | 0 | 0 | 2064 | 1024 | 0 | 0 | 0 | sdma_data_fifo_16x1024|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 6147 | 6164 | 0 | 0 | 0 | 0 | 0 | 0 | 4619 | 32 | 0 | 0 | 0 | param_gen_self_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 2220 | 5881 | 0 | 0 | 0 | 0 | 0 | 0 | 8600 | 267 | 0 | 0 | 0 | rd_data_fifo256_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 4117 | 5176 | 0 | 0 | 0 | 0 | 0 | 0 | 2099 | 0 | 0 | 0 | 0 | pre_cal_data_distr|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
| 0 | 4516 | 0 | 0 | 0 | 0 | 0 | 0 | 4563 | 35 | 0 | 0 | 0 | fp32_mul_group_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+-----------------------+
Top 10 (ordered by IO)
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| reg | lut | bram | uram | memsize | m18x18 | bufg | buft | nbI/O | nbBB | nbZV | nbME | dsp48 | name|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | CK_BUF|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | CK_INV|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | 0 | 0 | 0 | delay_n_cyc_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 248 | 0 | 0 | 0 | delay_n_cyc_0001|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 2 | 0 | 0 | 0 | forward_pipe_muti_cycle_0000_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 3 | 0 | 0 | 0 | forward_pipe_muti_cycle_0003_0001|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 7 | 0 | 0 | 0 | forward_pipe_muti_cycle_0005|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 16 | 0 | 0 | 0 | sram_rst_sync_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 4 | 0 | 0 | 0 | sync_cdc2_gray_0000|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 12 | 5 | 0 | 0 | 0 | sync_cdc2_gray_0001|
+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------------------+
Memories
Memory types
Number of memory types ordered by memory size:
logic: A(ll) C(onst write) F(forced) P(orts too many)
+-----+-----+-----+--------------+
| Size|Width|Depth|Number of zMem|
+-----+-----+-----+--------------+
| 0Mb| 1024| 0Mb| 1|
+-----+-----+-----+--------------+
| 8Kb| 1024| 8b| 1|
+-----+-----+-----+--------------+
|8208b| 1026| 8b| 1|
+-----+-----+-----+--------------+
|8256b| 1032| 8b| 1|
+-----+-----+-----+--------------+
| 9Kb| 288| 32b| 1|
+-----+-----+-----+--------------+
|9224b| 1153| 8b| 1|
+-----+-----+-----+--------------+
| 16Kb| 64| 256b| 1|
+-----+-----+-----+--------------+
| 32Kb| 64| 512b| 1|
+-----+-----+-----+--------------+
| 32Kb| 1024| 32b| 1|
+-----+-----+-----+--------------+
| 64Kb| 64| 1Kb| 2|
+-----+-----+-----+--------------+
| 64Kb| 1024| 64b| 1|
+-----+-----+-----+--------------+
|128Kb| 1024| 128b| 1|
+-----+-----+-----+--------------+
|256Kb| 64| 4Kb| 1|
+-----+-----+-----+--------------+
System Compilation
Statistics
0 marked wire(s) across 0 module(s) captured for readback.
0 readers added for System Verilog Assertions (SVA).
0 zviews, 0 sram_trace access, 0 read_port and 0 write_port were inserted, and 0 DVE XMRs were scheduled.
0 port (top and cores) has been simplified by a constant
Size
More detailed information about design size can be found in ^LINK(zTopBuild_report.html#K5.6.)zTopBuild_report.log, 5.6.Detection of sub-system candidates^LINK-
+-----------+-----+-----+---------+------+-----+-----+----+----+
| | REG| LUT|LUT W/O W|RAMLUT| LUT6|MUXCY|BRAM| DSP|
+-----------+-----+-----+---------+------+-----+-----+----+----+
|Design size|1739K|4902K| 4902K| 17K|1515K| 4|2251|1110|
+-----------+-----+-----+---------+------+-----+-----+----+----+
1195 Module(s)
21 Blackbox module(s)
1 External memory module(s)
0 Fast Waveform Capture IP module(s)
0 DPI module(s)
1 Qiwc IP module(s)
0 Asynchronous ZMEM module(s)
9 Synchronous ZMEM module(s)
66324 Disconnected module port(s) [in=42968 out=23356 inout=0]
803964 Disconnected instance port(s) [in=634478 out=169486 inout=0]
0 Disconnected wire(s)
30471 Loadless wire(s)
0 Sourceless wire(s)
348048 Uninitialized Register(s)
2528 Initialized Register(s)
Detailed manipulation logic size (*)
+------------------------------+---------------+---------------+---------------+---------------+---------------+----------+---------------+---------------+
| | REG| LUT| RAMLUT| LUT6| MUXCY| BRAM| DSP| QIWC|
+------------------------------+---------------+---------------+---------------+---------------+---------------+----------+---------------+---------------+
| Post-split design size| 2021122| 4902657| 16940| 1514651| 4| 2251| 1110| 1736045|
|Sync elements routing cost(**)| 0| 0| 0| 0| 0| 0| 0| 0|
| SUM| 2021122| 4902657| 16940| 1514651| 4| 2251| 1110| 1736045|
+------------------------------+---------------+---------------+---------------+---------------+---------------+----------+---------------+---------------+
(**)Note that sync elements routing cost include : reg cost of non-reg sync elements.
View: Memory
Delays summary
Report all different memory delay(s)
+-----------+----------+
| Delay | Memory |
+-----------+----------+
| 140 ns | 4 |
| 59 ns | 1 |
| 40 ns | 1061 |
+-----------+----------+
A total of 3 different delay(s) displayed
Histogram with all memory delay(s)
+---------------------+--------------------------------------------------+
| Delay | Memory |
+---------------------+--------------------------------------------------+
| [ 40 ns: 90 ns] |----------------------------------------> 1062|
| ] 90 ns: 140 ns[ |> 4|
+---------------------+--------------------------------------------------+
A total of 3 different delay(s) encountered
ZMEM
Top 10 (ordered by size)
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|Module | Mode|Data width|Address width|Nb ports|Nb instances|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, spram_zebu_4096x64_ZMEM_mem | SYNCHRONOUS| 64| 12| 1| 32|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_128x1024_ZMEM_mem | SYNCHRONOUS| 1024| 7| 2| 2|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_64x1024_ZMEM_mem | SYNCHRONOUS| 1024| 6| 2| 1|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, spram_zebu_1024x64_ZMEM_mem | SYNCHRONOUS| 64| 10| 1| 127|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, spram_zebu_1024x64_0001_ZMEM_mem | SYNCHRONOUS| 64| 10| 1| 1|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_32x1024_ZMEM_mem | SYNCHRONOUS| 1024| 5| 2| 2|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_296x64_ZMEM_mem | SYNCHRONOUS| 64| 9| 2| 512|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, spram_zebu_256x64_ZMEM_mem | SYNCHRONOUS| 64| 8| 1| 128|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, asyn_fifo_boreg_0000_0000_ZMEM_mem|SYNCHRONOUS/ASYNCHRONOUS| 1153| 3| 2| 1|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_32x288_ZMEM_mem | SYNCHRONOUS| 288| 5| 2| 256|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
Top 10 (ordered by number of ports)
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|Module | Mode|Data width|Address width|Nb ports|Nb instances|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_64x1024_ZMEM_mem | SYNCHRONOUS| 1024| 6| 2| 1|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_32x288_ZMEM_mem | SYNCHRONOUS| 288| 5| 2| 256|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_32x1024_ZMEM_mem | SYNCHRONOUS| 1024| 5| 2| 2|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_296x64_ZMEM_mem | SYNCHRONOUS| 64| 9| 2| 512|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, dpram_zebu_128x1024_ZMEM_mem | SYNCHRONOUS| 1024| 7| 2| 2|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, asyn_fifo_boreg_0000_0007_ZMEM_mem|SYNCHRONOUS/ASYNCHRONOUS| 1024| 3| 2| 1|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, asyn_fifo_boreg_0000_0005_ZMEM_mem|SYNCHRONOUS/ASYNCHRONOUS| 1026| 3| 2| 1|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, asyn_fifo_boreg_0000_0003_ZMEM_mem|SYNCHRONOUS/ASYNCHRONOUS| 1032| 3| 2| 1|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, asyn_fifo_boreg_0000_0000_ZMEM_mem|SYNCHRONOUS/ASYNCHRONOUS| 1153| 3| 2| 1|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
|work, spram_zebu_4096x64_ZMEM_mem | SYNCHRONOUS| 64| 12| 1| 32|
+----------------------------------------+------------------------+----------+-------------+--------+------------+
ZRM : Part_0
Top 10 (ordered by size)
+-----------------------------------------------------------+----------------------------+-----+--------+--------+---------------+-------------+---------+-------+
|Path |Module |Width| Depth|Nb ports|SSRAM ports req| Mapping|Bank type|Bank ID|
+-----------------------------------------------------------+----------------------------+-----+--------+--------+---------------+-------------+---------+-------+
|hw_top.axi_ram_inst.axi_sram_v1_0_S00_AXI_inst.ddr_inst.mem|dpram_zebu_2GBx1024_ZMEM_mem| 1024|16777216| 2| 64|UNIT0.MOD0.F3| DRAM| 0|
+-----------------------------------------------------------+----------------------------+-----+--------+--------+---------------+-------------+---------+-------+
Top 10 (ordered by number of ports)
+-----------------------------------------------------------+----------------------------+-----+--------+--------+---------------+-------------+---------+-------+
|Path |Module |Width| Depth|Nb ports|SSRAM ports req| Mapping|Bank type|Bank ID|
+-----------------------------------------------------------+----------------------------+-----+--------+--------+---------------+-------------+---------+-------+
|hw_top.axi_ram_inst.axi_sram_v1_0_S00_AXI_inst.ddr_inst.mem|dpram_zebu_2GBx1024_ZMEM_mem| 1024|16777216| 2| 64|UNIT0.MOD0.F3| DRAM| 0|
+-----------------------------------------------------------+----------------------------+-----+--------+--------+---------------+-------------+---------+-------+
Delays
Memory report
+-------------------------------------+---------+--------+----------+---------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------+
| Physical Memory| Delay | Type | Sys Freq | Property | Logical Memory Name(s)| Memory RTL Name|
+-------------------------------------+---------+--------+----------+---------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------+
| asyn_fifo_boreg_0000_0007_ZMEM_mem | 140 ns | ramlut | 7.14 MHz | P: 2 W: 1024 | hw_top.XXXX_top_inst.dma_top_u.dma_wrapper_inst.load_dma_top_u.u_axi2native_slave_write_ctrl.u_asyn_dat.mem | asyn_fifo_boreg_0000_0007.mem |
| asyn_fifo_boreg_0000_0005_ZMEM_mem | 140 ns | ramlut | 7.14 MHz | P: 2 W: 1026 | hw_top.XXXX_top_inst.dma_top_u.dma_wrapper_inst.load_dma_top_u.u_native2axi_master_read_ctrl.u_asyn_id_dat_8x1026.mem | asyn_fifo_boreg_0000_0005.mem |
| asyn_fifo_boreg_0000_0003_ZMEM_mem | 140 ns | ramlut | 7.14 MHz | P: 2 W: 1032 | hw_top.XXXX_top_inst.dma_top_u.dma_wrapper_inst.sdma_top_wrapper_u.sdma_arbit_axi_u.asyn_fifo_boreg_r.mem | asyn_fifo_boreg_0000_0003.mem |
| asyn_fifo_boreg_0000_0000_ZMEM_mem | 140 ns | ramlut | 7.14 MHz | P: 2 W: 1153 | hw_top.XXXX_top_inst.dma_top_u.dma_wrapper_inst.sdma_top_wrapper_u.sdma_arbit_axi_u.asyn_fifo_boreg_w.mem | asyn_fifo_boreg_0000_0000.mem |
| UNIT0.MOD0.F3_bank_1191182360 | 633 ns | dram3 | 16.95 MHz | P: 4 W: 512 Trans (59ns) | hw_top.axi_ram_inst.axi_sram_v1_0_S00_AXI_inst.ddr_inst.mem |
| dpram_zebu_32x288_ZMEM_mem_bca56ecf | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_56.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_98a9ea15 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_56.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_256x64_ZMEM_mem_f40930de | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_56.u_pe_al1.u_dispart.u_al1_pong_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_256x64_ZMEM_mem_cc7dca00 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_56.u_pe_al1.u_dispart.u_al1_ping_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| dpram_zebu_32x288_ZMEM_mem_58055150 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_8b0f1c73 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_ad64348 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_2edac792 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_256x64_ZMEM_mem_427a1d59 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_pe_al1.u_dispart.u_al1_pong_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_256x64_ZMEM_mem_7a0ee787 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_pe_al1.u_dispart.u_al1_ping_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_1024x64_ZMEM_mem_6969b2b1| 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_25__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem | spram_zebu_1024x64.mem |
| dpram_zebu_32x288_ZMEM_mem_25fd1483 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_f6f759a0 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_772e069b | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_53228241 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_256x64_ZMEM_mem_3f82588a | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_pe_al1.u_dispart.u_al1_pong_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_256x64_ZMEM_mem_7f6a254 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_pe_al1.u_dispart.u_al1_ping_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| dpram_zebu_32x288_ZMEM_mem_7140c964 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_a24a8447 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_2393db7c | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_79f5fa6 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_1024x64_ZMEM_mem_23205448| 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_24__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem | spram_zebu_1024x64.mem |
| spram_zebu_256x64_ZMEM_mem_6b3f856d | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_pe_al1.u_dispart.u_al1_pong_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_256x64_ZMEM_mem_534b7fb3 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_pe_al1.u_dispart.u_al1_ping_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| dpram_zebu_32x288_ZMEM_mem_f5bd4d4 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_dc5199f7 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_5d88c6cc | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_79844216 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_256x64_ZMEM_mem_152498dd | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_pe_al1.u_dispart.u_al1_pong_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_256x64_ZMEM_mem_2d506203 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_pe_al1.u_dispart.u_al1_ping_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| dpram_zebu_32x288_ZMEM_mem_dc7c5fa3 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_f761280 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_1024x64_ZMEM_mem_72bdf56 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_23__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem | spram_zebu_1024x64.mem |
| dpram_zebu_32x288_ZMEM_mem_8eaf4dbb | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_aaa3c961 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_256x64_ZMEM_mem_c60313aa | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_pe_al1.u_dispart.u_al1_pong_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_256x64_ZMEM_mem_fe77e974 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_pe_al1.u_dispart.u_al1_ping_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| dpram_zebu_32x288_ZMEM_mem_b6599710 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_6553da33 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_e48a8508 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_c08601d2 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_256x64_ZMEM_mem_ac26db19 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_pe_al1.u_dispart.u_al1_pong_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_256x64_ZMEM_mem_945221c7 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_pe_al1.u_dispart.u_al1_ping_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_1024x64_ZMEM_mem_4a45fe88| 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_22__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem | spram_zebu_1024x64.mem |
| dpram_zebu_32x288_ZMEM_mem_281af185 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_fb10bca6 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_7ac9e39d | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| dpram_zebu_32x288_ZMEM_mem_5ec56747 | 40 ns | bram | 25.00 MHz | P: 2 W: 288 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem | dpram_zebu_32x288.mem |
| spram_zebu_256x64_ZMEM_mem_3265bd8c | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_pe_al1.u_dispart.u_al1_pong_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| spram_zebu_256x64_ZMEM_mem_a114752 | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_pe_al1.u_dispart.u_al1_ping_sram.spram_zebu_256x64_u.mem | spram_zebu_256x64.mem |
| dpram_zebu_296x64_ZMEM_mem_856d113b | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_7__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u7.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_9eb8a307 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_7__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u6.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_54b70e81 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_7__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u5.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_ec974c5b | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_7__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u4.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| spram_zebu_1024x64_ZMEM_mem_c6f21bd | 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_21__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem | spram_zebu_1024x64.mem |
| dpram_zebu_296x64_ZMEM_mem_74813719 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_7__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u3.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_3ac343b | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_7__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u2.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_382e21c3 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_7__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u1.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_6cb834c5 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_7__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u0.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_e2199f92 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_6__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u7.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_f9cc2dae | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_6__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u6.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_33c38028 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_6__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u5.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_8be3c2f2 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_6__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u4.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_13f5b9b0 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_6__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u3.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_64d8ba92 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_6__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u2.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| spram_zebu_1024x64_ZMEM_mem_b37b589a| 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_20__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem | spram_zebu_1024x64.mem |
| dpram_zebu_296x64_ZMEM_mem_5f5aaf6a | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_6__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u1.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_bccba6c | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_6__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u0.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_689de81f | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_5__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u7.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_73485a23 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_5__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u6.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_b947f7a5 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_5__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u5.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_167b57f | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_5__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u4.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_9971ce3d | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_5__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u3.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_ee5ccd1f | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_5__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u2.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_d5ded8e7 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_5__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u1.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_8148cde1 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_5__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u0.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| spram_zebu_1024x64_ZMEM_mem_6776a67f| 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_19__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem | spram_zebu_1024x64.mem |
| dpram_zebu_296x64_ZMEM_mem_8ad03458 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_4__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u7.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_91058664 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_4__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u6.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_5b0a2be2 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_4__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u5.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_e32a6938 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_4__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u4.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_7b3c127a | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_4__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u3.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_c111158 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_4__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u2.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_379304a0 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_4__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u1.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_630511a6 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_4__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u0.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_9e131412 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_3__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u7.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_85c6a62e | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_3__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u6.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| spram_zebu_1024x64_ZMEM_mem_a5dbd658| 40 ns | bram | 25.00 MHz | P: 1 W: 64 | hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_18__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem | spram_zebu_1024x64.mem |
| dpram_zebu_296x64_ZMEM_mem_4fc90ba8 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_3__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u5.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_f7e94972 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_3__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u4.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_6fff3230 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_3__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u3.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_18d23112 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_3__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u2.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_235024ea | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_3__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u1.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_77c631ec | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_3__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u0.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
| dpram_zebu_296x64_ZMEM_mem_75599d55 | 40 ns | bram | 25.00 MHz | P: 2 W: 64 | hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.pe_wl_store_top_inst.pe_wl_store_top_2__pe_wl_store_lite_inst.sram_2p_296x64_wrapper_u7.dpram_zebu_296x64_u.mem | dpram_zebu_296x64.mem |
+-------------------------------------+---------+--------+----------+---------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------+
A total of 100 memory displayed
View: Optimization
System compilation
Global compilation options
+----------------------------+--------+
| Process| Mode|
+----------------------------+--------+
| Loop report| enabled|
| Clock localization (core)| enabled|
| Clock localization (fpga)| enabled|
| Data localization (core)| enabled|
| Data localization (fpga)|disabled|
|ac_annotate_neighbord_zcores| enabled|
| ac_annotate_prob_routes| enabled|
| ZRM transactional mode| enabled|
+----------------------------+--------+
Logic optimization options
Logic optimization is enabled (default).
+--------------------------------------------------+-----------------+
| Process| Mode|
+--------------------------------------------------+-----------------+
| Constant propagation|enabled (default)|
|Constant propagation (through low power instances)| enabled|
| Unused logic removal|enabled (default)|
| Write-only memories optimization|enabled (default)|
| Drop optimizable waveform captures| enabled|
| List of kept up-instances modules| <none>|
+--------------------------------------------------+-----------------+
Target
Use module
U0.M0
Partitioning
The partitioner used is : zTopPartitioning.
Filling rates
+--------------------------+---+---+------+----+---+
| |REG|LUT|RAMLUT|BRAM|DSP|
+--------------------------+---+---+------+----+---+
|User max filling rates (%)| 15| 35| 40| 60| 60|
| User overflow rates (%)| 5| 5| 10| 5| 0|
+--------------------------+---+---+------+----+---+
Lut weight
+------+-+-+-+-+-+-+
| LUT|1|2|3|4|5|6|
+------+-+-+-+-+-+-+
|Weight|0|1|1|1|1|1|
+------+-+-+-+-+-+-+
zCore Compilation : Part_0
Partitioning
The partitioner used is : zCorePartitioning.
Route System
+----------------------+-------------+
| Process| Mode|
+----------------------+-------------+
| Routing effort|medium_legacy|
|Post-processing effort| no_effort|
+----------------------+-------------+
Timing analysis
Multicycle paths analysis enabled
False path to : U0_M0_F11/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F11/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F11/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F11/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F11/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F11/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F11/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F11/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F11/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F11/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F11/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F11/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F11.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F8/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F8/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F8/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F8/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F8/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F8/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F8/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F8/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F8/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F8/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F8/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F8/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F8.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F5/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F5/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F5/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F5/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F5/zcbsplt_12881685940934282696 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_axi_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F5/zcbsplt_12881685940934282696 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_axi_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F5/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F5/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F5/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F5/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F5/zcbsplt_4121559343451484924 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_axi_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F5/zcbsplt_4121559343451484924 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_axi_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F5/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F5/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F5/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F5/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F5.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F4/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F4/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F4/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F4/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F4/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F4/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F4/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F4/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F4/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F4/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F4/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F4/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F4.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F3/zcbsplt_15263658802970500989
False path from : U0_M0_F3/zcbsplt_15263658802970500989
False path to : U0_M0_F3/zcbsplt_2399465065281915328
False path from : U0_M0_F3/zcbsplt_2399465065281915328
False path to : U0_M0_F3/zcbsplt_12881685940934282696
False path from : U0_M0_F3/zcbsplt_12881685940934282696
False path to : U0_M0_F3/zcbsplt_14521709027689051337
False path from : U0_M0_F3/zcbsplt_14521709027689051337
False path to : U0_M0_F3/zcbsplt_13092773993100236970
False path from : U0_M0_F3/zcbsplt_13092773993100236970
False path to : U0_M0_F3/zcbsplt_4121559343451484924
False path from : U0_M0_F3/zcbsplt_4121559343451484924
False path to : U0_M0_F3/zcbsplt_6198812527569865949
False path from : U0_M0_F3/zcbsplt_6198812527569865949
False path to : U0_M0_F3/zcbsplt_1378712325470658827
False path from : U0_M0_F3/zcbsplt_1378712325470658827
False path to : U0_M0_F2/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F2/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F2/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F2/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F2/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F2/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F2/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F2/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F2/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F2/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F2/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F2/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F2.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F1/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F1/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F1/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F1/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F1/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F1/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F1/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F1/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F1/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F1/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F1/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F1/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F1.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F0/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F0/zcbsplt_15263658802970500989 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F0/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path from : U0_M0_F0/zcbsplt_2399465065281915328 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_VAL.D'
False path to : U0_M0_F0/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F0/zcbsplt_14521709027689051337 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_apb_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F0/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path from : U0_M0_F0/zcbsplt_13092773993100236970 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_core_clk_0_\\.zebu_force_ins\\.fd_EN.D'
False path to : U0_M0_F0/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F0/zcbsplt_6198812527569865949 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_apb_rst_n_0_\\.VAL_sync.D'
False path to : U0_M0_F0/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
False path from : U0_M0_F0/zcbsplt_1378712325470658827 with alias 'hw_top.zClockCone_UNIT0\\.MOD0\\.F0.hw_top\\.zforce_i_scrm2core_sys_rst_n_0_\\.VAL_sync.D'
104 false path(s) displayed
View: Partitioning
zCore Compilation : Part_0
Resource utilization and IO cut by FPGA
+-------------------------+---------------+---------------+----------+---------------+----------+-------------+----------+-----------+---------------+-------------+--------------+--------------+---------------+------------+------------------+-------------------+-------------+-------+-------------+--------+------------------+---------+-----+
|FPGA\ Res(Used/Available)| LUT| LUT6| RAM| REG| DSP| RAMLUT|FWC_IP_NUM|FWC_IP_BITS| QIWC_IP_BITS|READ_PORT_IPS|READ_PORT_BITS|WRITE_PORT_IPS|WRITE_PORT_BITS|ZC_TRACE_BIT|ZCEI_MESSAGE_INPUT|ZCEI_MESSAGE_OUTPUT| FW_RESOURCES|ZPRD_BB| ZFORCE| ZVIEW| ZRM_SLOTS|ZRM_PORTS| IO|
+-------------------------+---------------+---------------+----------+---------------+----------+-------------+----------+-----------+---------------+-------------+--------------+--------------+---------------+------------+------------------+-------------------+-------------+-------+-------------+--------+------------------+---------+-----+
| U0_M0_F00| 557862/1013184| 229359/709228| 0/1636| 195505/1013184| 222/1728| 0/172400| 0/304742| 0/68567| 313/524288| 0/256| 0/8192| 0/256| 0/8192| 0/65536| 0/486| 0/486| 0/4294967295| 0/8000| 0/4294967295|0/100000| 0/0| 0/0| 1352|
| U0_M0_F01| 998825/1013184| 338807/709228| 416/1636| 454533/1013184| 128/1728| 0/172400| 0/304742| 0/68567| 328027/524288| 0/256| 0/8192| 0/256| 0/8192| 0/65536| 0/486| 0/486| 0/4294967295| 0/8000| 0/4294967295|0/100000| 0/16777216| 0/16| 2868|
| U0_M0_F02| 334038/1013184| 120406/709228| 0/1636| 115278/1013184| 264/1728| 0/172400| 0/304742| 0/68567| 76592/524288| 0/256| 0/8192| 0/256| 0/8192| 0/65536| 0/486| 0/486| 0/4294967295| 0/8000| 0/4294967295|0/100000| 0/16777216| 0/16| 2721|
| U0_M0_F03| 730948/1013184| 380276/709228| 587/1636| 617984/1013184| 112/1728| 16940/172400| 0/304742| 0/68567| 347610/524288| 0/256| 0/8192| 0/256| 0/8192| 0/65536| 0/486| 0/486| 0/4294967295| 0/8000| 0/4294967295|0/100000| 16777216/67108864| 2/8| 4424|
| U0_M0_F04|1001139/1013184| 339834/709228| 416/1636| 458534/1013184| 128/1728| 0/172400| 0/304742| 0/68567| 330751/524288| 0/256| 0/8192| 0/256| 0/8192| 0/65536| 0/486| 0/486| 0/4294967295| 0/8000| 0/4294967295|0/100000| 0/16777216| 0/16| 2691|
| U0_M0_F05| 513634/1013184| 171575/709228| 208/1636| 247071/1013184| 64/1728| 0/172400| 0/304742| 0/68567| 164234/524288| 0/256| 0/8192| 0/256| 0/8192| 0/65536| 20/486| 20/486| 0/4294967295| 0/8000| 0/4294967295|0/100000| 0/0| 0/0| 2790|
| U0_M0_F08| 497989/1013184| 168856/709228| 208/1636| 224471/1013184| 64/1728| 0/172400| 0/304742| 0/68567| 162113/524288| 0/256| 0/8192| 0/256| 0/8192| 0/65536| 0/486| 0/486| 0/4294967295| 0/8000| 0/4294967295|0/100000| 0/16777216| 0/16| 1468|
| U0_M0_F11| 997546/1013184| 338432/709228| 416/1636| 452141/1013184| 128/1728| 0/172400| 0/304742| 0/68567| 326405/524288| 0/256| 0/8192| 0/256| 0/8192| 0/65536| 0/486| 0/486| 0/4294967295| 0/8000| 0/4294967295|0/100000| 0/0| 0/0| 2806|
+-------------------------+---------------+---------------+----------+---------------+----------+-------------+----------+-----------+---------------+-------------+--------------+--------------+---------------+------------+------------------+-------------------+-------------+-------+-------------+--------+------------------+---------+-----+
| SUM|5631982/8105472|2087546/5673824|2251/13088|2765517/8105472|1110/13824|16940/1379200| 0/2437936| 0/548536|1736045/4194304| 0/2048| 0/65536| 0/2048| 0/65536| 0/524288| 20/3888| 20/3888|0/34359738360|0/64000|0/34359738360|0/800000|16777216/134217728| 2/72|21120|
+-------------------------+---------------+---------------+----------+---------------+----------+-------------+----------+-----------+---------------+-------------+--------------+--------------+---------------+------------+------------------+-------------------+-------------+-------+-------------+--------+------------------+---------+-----+
Inter partitions IO cuts (undirected)
+---------+---------+---------+---------+---------+---------+---------+---------+---------+---------+
|From \ To|U0_M0_F00|U0_M0_F01|U0_M0_F02|U0_M0_F03|U0_M0_F04|U0_M0_F05|U0_M0_F08|U0_M0_F11|Interface|
+---------+---------+---------+---------+---------+---------+---------+---------+---------+---------+
|U0_M0_F00| 0| 0/69| 0/69| 1350/70| 0/70| 0/60| 2/0| 0/0| 0|
|U0_M0_F01| 0/69| 0| 260/98| 1339/89| 1054/98| 37/90| 99/0| 85/0| 0|
|U0_M0_F02| 0/69| 260/98| 0| 1680/88| 260/99| 261/90| 130/40| 130/0| 0|
|U0_M0_F03| 1350/70| 1339/89| 1680/88| 0| 281/88| 256/90| 43/0| 246/0| 0|
|U0_M0_F04| 0/70| 1054/98| 260/99| 281/88| 0| 1055/90| 39/0| 2/0| 0|
|U0_M0_F05| 0/60| 37/90| 261/90| 256/90| 1055/90| 0| 3/0| 1182/70| 0|
|U0_M0_F08| 2/0| 99/0| 130/40| 43/0| 39/0| 3/0| 0| 1161/90| 0|
|U0_M0_F11| 0/0| 85/0| 130/0| 246/0| 2/0| 1182/70| 1161/90| 0| 0|
|Interface| 0| 0| 0| 0| 0| 0| 0| 0| 0|
+---------+---------+---------+---------+---------+---------+---------+---------+---------+---------+
| SUM CUT| 1352| 2874| 2721| 5195| 2691| 2794| 1477| 2806| 0|
+---------+---------+---------+---------+---------+---------+---------+---------+---------+---------+
View: Performance
Timing Analysis
Theoretical frequency: 5918 Khz
(using default settings and ignoring clock skew)
Driver clock frequency is limited by fpga internal data paths (driverClk.Period = zClockFilterTime + DELAY_MIN_ZFILTER_DRVCLK)
see Partitioning tab
see zTime.html
source : ^LINK(zTime.html)zTime.log^LINK-
No inter-fpga filter path found
Critical routing data path delay : 165 ns
. Constant part : 87 ns
. Multiplexed part : 78 ns
. Memory latency part : 0 ns
Xclock frequency is : 600 MHz
Longest memory latency is : 140 ns
Fast Waveform Captures detected, if use at run-time the driverClk frequency might be limited.
Driver clock frequency is constrained at a maximum of 10000kHz (100ns)
System Compilation
Final resource utilization and IO cut by core
+------+------+------+------+------+-----+-----+-----+-------------------+--+
|ZCORE | REG| LUT|RAMLUT| LUT6|MUXCY| BRAM| DSP|LUT (w/o weighting)|IO|
+------+------+------+------+------+-----+-----+-----+-------------------+--+
|Part_0|1,740K|4,902K| 17K|1,515K| 4|2,251|1,110| 4,902K| 0|
+------+------+------+------+------+-----+-----+-----+-------------------+--+
zCore Compilation : Part_0
Final resource utilization and IO cut by FPGA
FPGAs after partitioning and clock localization steps.
FPGAs after partitioning and clock localization steps.
+--------------+-----------------+----------+-----------------+--------------+-----------------------------+-----------+-----------+-----+------+
|FPGA | REG|(*)MUXF7,8| LUT| RAMLUT| (**)MUXCY| BRAM| DSP| CUT|STATUS|
+--------------+-----------------+----------+-----------------+--------------+-----------------------------+-----------+-----------+-----+------+
|UNIT0.MOD0.F0 | 205101 /5065920| 4298| 557258 /2532960| 192 /344800| 0/lut(0)/lut_no_weighting(0)| 0 /2518| 222 /2880| 1366| OK|
|UNIT0.MOD0.F1 | 485810 /5065920| 24129| 870244 /2532960| 192 /344800| 0/lut(0)/lut_no_weighting(0)| 416 /2518| 128 /2880| 2871| OK|
|UNIT0.MOD0.F2 | 91223 /5065920| 2709| 309854 /2532960| 192 /344800| 0/lut(0)/lut_no_weighting(0)| 0 /2518| 264 /2880| 2734| OK|
|UNIT0.MOD0.F3 | 482759 /5065920| 29088| 566784 /2532960| 17132 /344800| 4/lut(4)/lut_no_weighting(4)| 587 /2518| 112 /2880| 4427| OK|
|UNIT0.MOD0.F4 | 490979 /5065920| 24129| 871662 /2532960| 192 /344800| 0/lut(0)/lut_no_weighting(0)| 416 /2518| 128 /2880| 2703| OK|
|UNIT0.MOD0.F5 | 258671 /5065920| 12075| 451214 /2532960| 192 /344800|37/lut(1)/lut_no_weighting(1)| 208 /2518| 64 /2880| 2860| OK|
|UNIT0.MOD0.F8 | 240949 /5065920| 12075| 436214 /2532960| 192 /344800| 0/lut(0)/lut_no_weighting(0)| 208 /2518| 64 /2880| 1480| OK|
|UNIT0.MOD0.F11| 482862 /5065920| 24129| 869514 /2532960| 192 /344800| 0/lut(0)/lut_no_weighting(0)| 416 /2518| 128 /2880| 2833| OK|
+--------------+-----------------+----------+-----------------+--------------+-----------------------------+-----------+-----------+-----+------+
|SUM |2738354 /40527360| 132632|4932744 /20263680|18476 /2758400|41/lut(5)/lut_no_weighting(5)|2251 /20144|1110 /23040|21274| --|
+--------------+-----------------+----------+-----------------+--------------+-----------------------------+-----------+-----------+-----+------+
REG : REG count in generated netlists / FPGA capacity.
(*)MUXF7,8 : MUXF7 and MUXF8 count in generated netlists. A cost of 1 register is associated to each MUXF7 or MUXF8, this
additionnal cost is not included in the REG column.
LUT : LUT count in generated netlists, including RAMLUTs / FPGA capacity.
RAMLUT : RAMLUT count in generated netlists / FPGA capacity.
(**)MUXCY : MUXCY count in generated netlists. Depending on connectivity, a cost of 1 LUT (modulo lut weighting) is associated to
MUXCY, this additionnal cost is not included in the LUT column.
BRAM : Block RAM count in generated netlists / FPGA capacity.
DSP : DSP count in generated netlists / FPGA capacity.
CUT : Number of ports at the interface of the FPGA.
STATUS : FPGA capacity and cut status.
Routing paths
Report a maximum of 100 first routing data path(s)
+-------+------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Slack | Required Time | Delay | Fpga | Clock Domain Source | Clock Domain Target |Port Name Source |Port Name Target |
+-------+------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| 0 ns|165 ns ( 1 dvrCk )| 165 ns| 3|hw_top.XXXX_top_inst.dma_top_u.dma_wrapper_inst.load_dma_top_u.lw_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F3.zcbsplt_15767409058633768193 |U0_M0_F11.zcbsplt_2214274636560312640 |
| 1 ns|165 ns ( 1 dvrCk )| 164 ns| 2|hw_top.XXXX_top_inst.vp_top_u.vp_clk_gating_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F0.zcbsplt_6250204994218825154 |U0_M0_F3.zcbsplt_6250204994218825154 |
| 6 ns|165 ns ( 1 dvrCk )| 159 ns| 3|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F11.zcbsplt_13091169782206285910 |U0_M0_F2.zcbsplt_1907846578144471731 |
| 22 ns|165 ns ( 1 dvrCk )| 143 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.vp_top_u.vp_clk_gating_inst.o_clk (posedge) |U0_M0_F3.zcbsplt_5244995449557546594 |U0_M0_F0.zcbsplt_5244995449557546594 |
| 24 ns|165 ns ( 1 dvrCk )| 141 ns| 3|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_pe_wl_top.CK_GATE_pe_wl_top_u0.o_clk (posedge) |U0_M0_F1.zcbsplt_5340313843403434235 |U0_M0_F8.zcbsplt_5340313843403434235 |
| 25 ns|165 ns ( 1 dvrCk )| 139 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.vp_top_u.vp_clk_gating_inst.o_clk (posedge) |U0_M0_F3.zcbsplt_1980618113726823825 |U0_M0_F0.zcbsplt_1980618113726823825 |
| 26 ns|165 ns ( 1 dvrCk )| 139 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_4427215203513305397 |U0_M0_F3.zcbsplt_4427215203513305397 |
| 27 ns|165 ns ( 1 dvrCk )| 137 ns| 5|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver3.u_CK_GATE_XXXX_pe3_group.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F4.zcbsplt_4121502526458268731 |U0_M0_F1.zcbsplt_3833316144124901800 |
| 27 ns|165 ns ( 1 dvrCk )| 137 ns| 3|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_pe_wl_top.CK_GATE_pe_wl_top_u0.o_clk (posedge) |U0_M0_F1.zcbsplt_10023192966132682840 |U0_M0_F11.zcbsplt_1624275485183459757 |
| 28 ns|165 ns ( 1 dvrCk )| 137 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |U0_M0_F4.zcbsplt_7898793271990645043 |U0_M0_F2.zcbsplt_3421155121278963862 |
| 29 ns|165 ns ( 1 dvrCk )| 136 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F4.zcbsplt_2034328864884614142 |U0_M0_F5.zcbsplt_2034328864884614142 |
| 29 ns|165 ns ( 1 dvrCk )| 136 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F4.zcbsplt_2034328864884614142 |U0_M0_F5.zcbsplt_2034328864884614142 |
| 30 ns|165 ns ( 1 dvrCk )| 134 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_16126336447350197707 |U0_M0_F3.zcbsplt_16126336447350197707 |
| 30 ns|165 ns ( 1 dvrCk )| 135 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_rctrl_top_u.u_per_clk_inst.o_clk (posedge) |U0_M0_F1.zcbsplt_11251407446606638717 |U0_M0_F3.zcbsplt_11251407446606638717 |
| 31 ns|165 ns ( 1 dvrCk )| 133 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F4.zcbsplt_17512650854575980445 |U0_M0_F5.zcbsplt_17512650854575980445 |
| 31 ns|165 ns ( 1 dvrCk )| 133 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_16884681339257068396 |U0_M0_F3.zcbsplt_16884681339257068396 |
| 31 ns|165 ns ( 1 dvrCk )| 134 ns| 3|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver5.u_pe_wl_top.CK_GATE_pe_wl_top_u0.o_clk (posedge) |U0_M0_F1.zcbsplt_16295495871760646342 |U0_M0_F11.zcbsplt_4649375676974898792 |
| 32 ns|165 ns ( 1 dvrCk )| 132 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_11517047688462929710 |U0_M0_F3.zcbsplt_11517047688462929710 |
| 35 ns|165 ns ( 1 dvrCk )| 129 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver0.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F3.zcbsplt_16423740862727607158 |U0_M0_F1.zcbsplt_9849301376533778045 |
| 35 ns|165 ns ( 1 dvrCk )| 130 ns| 3|hw_top.i_scrm2core_core_clk[0] (posedge) |DRIVERCLOCK (system) |U0_M0_F1.zcbsplt_1113356475384978976 |U0_M0_F11.zcbsplt_1113356475384978976 |
| 35 ns|165 ns ( 1 dvrCk )| 130 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_16993352671805018064 |U0_M0_F3.zcbsplt_16993352671805018064 |
| 36 ns|165 ns ( 1 dvrCk )| 129 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_12534665510575566342 |U0_M0_F3.zcbsplt_12534665510575566342 |
| 36 ns|165 ns ( 1 dvrCk )| 129 ns| 2|hw_top.XXXX_top_inst.vp_top_u.vp_clk_gating_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F0.zcbsplt_16734643362236131838 |U0_M0_F3.zcbsplt_16734643362236131838 |
| 37 ns|165 ns ( 1 dvrCk )| 128 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_13356398626133891201 |U0_M0_F3.zcbsplt_13356398626133891201 |
| 38 ns|165 ns ( 1 dvrCk )| 126 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_1868305990658892592 |U0_M0_F3.zcbsplt_1868305990658892592 |
| 40 ns|165 ns ( 1 dvrCk )| 124 ns| 2|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver3.u_CK_GATE_XXXX_pe3_group.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F4.zcbsplt_9352126220533023917 |U0_M0_F5.zcbsplt_9352126220533023917 |
| 40 ns|165 ns ( 1 dvrCk )| 124 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_13009415235544399236 |U0_M0_F3.zcbsplt_13009415235544399236 |
| 40 ns|165 ns ( 1 dvrCk )| 124 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F4.zcbsplt_8240576889367357488 |U0_M0_F5.zcbsplt_8240576889367357488 |
| 40 ns|165 ns ( 1 dvrCk )| 125 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F4.zcbsplt_16155843404118470425 |U0_M0_F5.zcbsplt_16155843404118470425 |
| 40 ns|165 ns ( 1 dvrCk )| 125 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F4.zcbsplt_3743173501310309923 |U0_M0_F5.zcbsplt_3743173501310309923 |
| 41 ns|165 ns ( 1 dvrCk )| 123 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_2172683280964543691 |U0_M0_F3.zcbsplt_2172683280964543691 |
| 41 ns|165 ns ( 1 dvrCk )| 123 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_12832432159830787501 |U0_M0_F3.zcbsplt_12832432159830787501 |
| 41 ns|165 ns ( 1 dvrCk )| 123 ns| 4|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver6.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F2.zcbsplt_4729773985591297777 |U0_M0_F11.zcbsplt_7352923812499998861 |
| 41 ns|165 ns ( 1 dvrCk )| 124 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_10632431367411729201 |U0_M0_F3.zcbsplt_10632431367411729201 |
| 41 ns|165 ns ( 1 dvrCk )| 124 ns| 2|hw_top.XXXX_top_inst.vp_top_u.vp_clk_gating_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F0.zcbsplt_6554082317099967198 |U0_M0_F3.zcbsplt_6554082317099967198 |
| 42 ns|165 ns ( 1 dvrCk )| 123 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_3962960362681624527 |U0_M0_F3.zcbsplt_3962960362681624527 |
| 43 ns|165 ns ( 1 dvrCk )| 121 ns| 3|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver3.u_CK_GATE_XXXX_pe3_group.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F4.zcbsplt_16077722198685449845 |U0_M0_F3.zcbsplt_3519086927189707330 |
| 43 ns|165 ns ( 1 dvrCk )| 122 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |U0_M0_F4.zcbsplt_437029693116741452 |U0_M0_F2.zcbsplt_10710730787279485696 |
| 43 ns|165 ns ( 1 dvrCk )| 122 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.vp_top_u.vp_clk_gating_inst.o_clk (posedge) |U0_M0_F3.zcbsplt_3001392337591780105 |U0_M0_F0.zcbsplt_3001392337591780105 |
| 44 ns|165 ns ( 1 dvrCk )| 120 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F4.zcbsplt_15985005012651709747 |U0_M0_F5.zcbsplt_15985005012651709747 |
| 44 ns|165 ns ( 1 dvrCk )| 121 ns| 2|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F5.zcbsplt_4684272553267827939 |U0_M0_F4.zcbsplt_4684272553267827939 |
| 46 ns|165 ns ( 1 dvrCk )| 118 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_9523852379585495191 |U0_M0_F3.zcbsplt_9523852379585495191 |
| 46 ns|165 ns ( 1 dvrCk )| 119 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_2227770031194228949 |U0_M0_F3.zcbsplt_2227770031194228949 |
| 49 ns|165 ns ( 1 dvrCk )| 116 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_16555209119787348261 |U0_M0_F3.zcbsplt_16555209119787348261 |
| 49 ns|165 ns ( 1 dvrCk )| 116 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver3.u_CK_GATE_XXXX_pe3_group.o_clk (posedge) |U0_M0_F5.zcbsplt_10388150185649577016 |U0_M0_F4.zcbsplt_10388150185649577016 |
| 51 ns|165 ns ( 1 dvrCk )| 114 ns| 2|hw_top.XXXX_top_inst.pew_top_u.pew_clk_inst.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |U0_M0_F2.zcbsplt_4806513438244293296 |U0_M0_F3.zcbsplt_4806513438244293296 |
| 52 ns|165 ns ( 1 dvrCk )| 112 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver3.u_CK_GATE_XXXX_pe3_group.o_clk (posedge) |U0_M0_F5.zcbsplt_1720857772514892755 |U0_M0_F4.zcbsplt_1720857772514892755 |
| 54 ns|165 ns ( 1 dvrCk )| 110 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver3.u_CK_GATE_XXXX_pe3_group.o_clk (posedge) |U0_M0_F5.zcbsplt_1221849955133103975 |U0_M0_F4.zcbsplt_1221849955133103975 |
| 54 ns|165 ns ( 1 dvrCk )| 111 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_pe_wl_top.CK_GATE_pe_wl_top_u0.o_clk (posedge) |U0_M0_F4.zcbsplt_1745906737157773685 |U0_M0_F5.zcbsplt_1745906737157773685 |
| 55 ns|165 ns ( 1 dvrCk )| 109 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |DRIVERCLOCK (system) |U0_M0_F1.zcbsplt_7056270475500889712 |U0_M0_F3.zcbsplt_7056270475500889712 |
| 56 ns|165 ns ( 1 dvrCk )| 108 ns| 3|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver2.u_pe_wl_top.CK_GATE_pe_wl_top_u0.o_clk (posedge) |U0_M0_F11.zcbsplt_14909411033725369003 |U0_M0_F4.zcbsplt_14909411033725369003 |
| 57 ns|165 ns ( 1 dvrCk )| 107 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver2.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F2.zcbsplt_7565185848181668985 |U0_M0_F4.zcbsplt_7565185848181668985 |
| 63 ns|165 ns ( 1 dvrCk )| 101 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver0.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F2.zcbsplt_8070496759020828164 |U0_M0_F1.zcbsplt_14961408404933177783 |
| 64 ns|165 ns ( 1 dvrCk )| 100 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.vp_top_u.vp_clk_gating_inst.o_clk (posedge) |U0_M0_F3.zcbsplt_12660755734899412010 |U0_M0_F0.zcbsplt_12660755734899412010 |
| 65 ns|165 ns ( 1 dvrCk )| 99 ns| 3|DRIVERCLOCK (system) |DRIVERCLOCK (system) |U0_M0_F5.zcbsplt_7088038143325698513 |U0_M0_F8.F08_ts_clkbus_in[10] |
| 65 ns|165 ns ( 1 dvrCk )| 100 ns| 2|hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_4__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.CK_GATE_u.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.l2buffer_top_u.ram159_instance_4__l2buffer_ram_wrapper_u.ram_ctrl_u.sram_sp_1024x64_wrapper_u.spram_zebu_1024x64_u.mem-rw0do[63] |U0_M0_F3-U0_M0_F3.U0_M0_F3_core.XXXX_top_inst.l2buffer_top_u.ram159_instance_4__l2buffer_ram_wrapper_u.ram_ctrl_u.rdata_d[63].D |
| 65 ns|165 ns ( 1 dvrCk )| 100 ns| 2|hw_top.sram_top_wrapper_inst.sram_top_inst.sram_32x4096x64_control_inst.sram_4096x64x8_inst2.sram_sp_4096x64_wrapper_inst1.CK_GATE_u.o_clk (posedge) |hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.sram_top_wrapper_inst.sram_top_inst.sram_32x4096x64_control_inst.sram_4096x64x8_inst2.sram_sp_4096x64_wrapper_inst1.spram_zebu_4096x64_u.mem-rw0do[63] |U0_M0_F3-U0_M0_F3.U0_M0_F3_core.sram_top_wrapper_inst.sram_top_inst.sram_32x4096x64_control_inst.rd_data[63].D |
| 65 ns|165 ns ( 1 dvrCk )| 100 ns| 2|hw_top.XXXX_top_inst.dma_top_u.dma_wrapper_inst.load_dma_top_u.u_sync_in.u_native_write.u_ssfifo_1024to256.SSFIFO_32_u_sram_32x1024.sram_ck_gate.o_clk (posedge)|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.dma_top_u.dma_wrapper_inst.load_dma_top_u.u_sync_in.u_native_write.u_ssfifo_1024to256.SSFIFO_32_u_sram_32x1024.dpram_zebu_32x1024_u.mem-r1do[1023]|U0_M0_F3-U0_M0_F3.U0_M0_F3_core.XXXX_top_inst.dma_top_u.dma_wrapper_inst.load_dma_top_u.u_sync_in.u_native_write.u_ssfifo_1024to256.u_ssfifo_1024.q0[1023].D |
| 67 ns|165 ns ( 1 dvrCk )| 97 ns| 3|DRIVERCLOCK (system) |hw_top.i_scrm2core_apb_clk[0] (posedge) |U0_M0_F3.zcbsplt_4947520062132105817 |U0_M0_F11.zcbsplt_4947520062132105817 |
| 67 ns|165 ns ( 1 dvrCk )| 98 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F2.zcbsplt_2428873231420939730 |U0_M0_F5.zcbsplt_2428873231420939730 |
| 70 ns|165 ns ( 1 dvrCk )| 94 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |DRIVERCLOCK (system) |U0_M0_F1.zcbsplt_1113356475384978976 |U0_M0_F5.zcbsplt_1113356475384978976 |
| 70 ns|165 ns ( 1 dvrCk )| 95 ns| 3|DRIVERCLOCK (system) |DRIVERCLOCK (system) |U0_M0_F11.zcbsplt_13671904568337355006 |U0_M0_F2.F02_ts_clkbus_in[7] |
| 71 ns|165 ns ( 1 dvrCk )| 94 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver5.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F2.zcbsplt_17961402469254255780 |U0_M0_F5.zcbsplt_6113647786031550950 |
| 71 ns|165 ns ( 1 dvrCk )| 94 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.vp_top_u.vp_clk_gating_inst.o_clk (posedge) |U0_M0_F3.zcbsplt_14395655167831963353 |U0_M0_F0.zcbsplt_14395655167831963353 |
| 73 ns|165 ns ( 1 dvrCk )| 91 ns| 2|hw_top.i_scrm2core_core_clk[0] (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_CK_GATE_XXXX_pe_group.o_clk (posedge) |U0_M0_F2.zcbsplt_1194742965024960492 |U0_M0_F8.zcbsplt_1194742965024960492 |
| 77 ns|165 ns ( 1 dvrCk )| 88 ns| 3|DRIVERCLOCK (system) |hw_top.i_scrm2core_apb_clk[0] (posedge) |U0_M0_F3.zcbsplt_4947520062132105817 |U0_M0_F8.zcbsplt_4947520062132105817 |
| 80 ns|165 ns ( 1 dvrCk )| 85 ns| 2|DRIVERCLOCK (system) |hw_top.i_scrm2core_apb_clk[0] (posedge) |U0_M0_F3.zcbsplt_4947520062132105817 |U0_M0_F0.zcbsplt_4947520062132105817 |
| 82 ns|165 ns ( 1 dvrCk )| 83 ns| 2|DRIVERCLOCK (system) |hw_top.i_scrm2core_apb_clk[0] (posedge) |U0_M0_F3.zcbsplt_4947520062132105817 |U0_M0_F2.zcbsplt_4947520062132105817 |
| 84 ns|165 ns ( 1 dvrCk )| 81 ns| 3|DRIVERCLOCK (system) |DRIVERCLOCK (system) |U0_M0_F11.zcbsplt_13671904568337355006 |U0_M0_F4.F04_ts_clkbus_in[7] |
| 91 ns|165 ns ( 1 dvrCk )| 74 ns| 3|DRIVERCLOCK (system) |DRIVERCLOCK (system) |U0_M0_F11.zcbsplt_3565892424006207937 |U0_M0_F1.F01_ts_clkbus_in[5] |
| 91 ns|165 ns ( 1 dvrCk )| 74 ns| 2|DRIVERCLOCK (system) |hw_top.i_scrm2core_apb_clk[0] (posedge) |U0_M0_F3.zcbsplt_4947520062132105817 |U0_M0_F1.zcbsplt_4947520062132105817 |
| 94 ns|165 ns ( 1 dvrCk )| 70 ns| 2|DRIVERCLOCK (system) |hw_top.i_scrm2core_apb_clk[0] (posedge) |U0_M0_F3.zcbsplt_4947520062132105817 |U0_M0_F4.zcbsplt_4947520062132105817 |
| 94 ns|165 ns ( 1 dvrCk )| 71 ns| 3|DRIVERCLOCK (system) |DRIVERCLOCK (system) |U0_M0_F11.zcbsplt_3565892424006207937 |U0_M0_F0.F00_ts_clkbus_in[5] |
| 97 ns|165 ns ( 1 dvrCk )| 67 ns| 2|DRIVERCLOCK (system) |hw_top.i_scrm2core_apb_clk[0] (posedge) |U0_M0_F3.zcbsplt_4947520062132105817 |U0_M0_F5.zcbsplt_4947520062132105817 |
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_pong_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_pong_bank0.u_CK_GATE.o_clk (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN |
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_pong_bank0.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank0.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank0.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_ol1_tpsram_pong_bank0.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_40.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_pong_bank0.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_pong_bank1.u_CK_GATE.o_clk (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN |
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank0.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank0.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_56.u_ol1_tpsram_pong_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_56.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_56.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_pong_bank1.u_CK_GATE.o_clk (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN |
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN |
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F5-U0_M0_F5.U0_M0_F5_core.XXXX_top_inst.pe_array_u.u_pe_group_ver4.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN |
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank0.u_CK_GATE.o_clk (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank0.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN |
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_pong_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_24.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_pong_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_16.u_ol1_tpsram_pong_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_0.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN |
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_48.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge)|hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_32.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN|
| 125 ns|165 ns ( 1 dvrCk )| 40 ns| 2|DRIVERCLOCK (system) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_ping_bank1.u_CK_GATE.o_clk (posedge) |hw_top.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem-r1re_inv |U0_M0_F8-U0_M0_F8.U0_M0_F8_core.XXXX_top_inst.pe_array_u.u_pe_group_ver7.u_XXXX_v2_pe_ver0.u_XXXX_v2_pe_8.u_ol1_tpsram_ping_bank1.dpram_zebu_32x288_u.mem.RAMB36E1_2.ENARDEN |
+-------+------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
A total of 100 inter-fpga path(s) displayed
Report a maximum of 50 first different delay(s)
+-----------+-----------+-----------+-----------+-----------+
| Delay | Paths | Max Fpga | Max Hop | Max Async |
+-----------+-----------+-----------+-----------+-----------+
| 165 ns | 1 | 3 | 1 | 0 |
| 164 ns | 1 | 2 | 0 | 0 |
| 159 ns | 1 | 3 | 1 | 0 |
| 143 ns | 1 | 2 | 0 | 0 |
| 141 ns | 1 | 3 | 1 | 0 |
| 139 ns | 2 | 2 | 0 | 0 |
| 137 ns | 3 | 5 | 2 | 1 |
| 136 ns | 2 | 2 | 0 | 0 |
| 134 ns | 1 | 2 | 0 | 0 |
| 135 ns | 1 | 2 | 0 | 0 |
| 133 ns | 2 | 2 | 0 | 0 |
| 134 ns | 1 | 3 | 1 | 0 |
| 132 ns | 1 | 2 | 0 | 0 |
| 129 ns | 1 | 2 | 0 | 0 |
| 130 ns | 2 | 3 | 1 | 0 |
| 129 ns | 2 | 2 | 0 | 0 |
| 128 ns | 1 | 2 | 0 | 0 |
| 126 ns | 1 | 2 | 0 | 0 |
| 124 ns | 3 | 2 | 0 | 0 |
| 125 ns | 2 | 2 | 0 | 0 |
| 123 ns | 3 | 4 | 2 | 0 |
| 124 ns | 2 | 2 | 0 | 0 |
| 123 ns | 1 | 2 | 0 | 0 |
| 121 ns | 1 | 3 | 0 | 1 |
| 122 ns | 2 | 2 | 0 | 0 |
| 120 ns | 1 | 2 | 0 | 0 |
| 121 ns | 1 | 2 | 0 | 0 |
| 118 ns | 1 | 2 | 0 | 0 |
| 119 ns | 1 | 2 | 0 | 0 |
| 116 ns | 2 | 2 | 0 | 0 |
| 114 ns | 1 | 2 | 0 | 0 |
| 112 ns | 1 | 2 | 0 | 0 |
| 110 ns | 1 | 2 | 0 | 0 |
| 111 ns | 1 | 2 | 0 | 0 |
| 109 ns | 1 | 2 | 0 | 0 |
| 108 ns | 1 | 3 | 1 | 0 |
| 107 ns | 1 | 2 | 0 | 0 |
| 101 ns | 1 | 2 | 0 | 0 |
| 100 ns | 1 | 2 | 0 | 0 |
| 99 ns | 1 | 3 | 0 | 1 |
| 100 ns | 3 | 2 | 0 | 0 |
| 97 ns | 1 | 3 | 1 | 0 |
| 98 ns | 1 | 2 | 0 | 0 |
| 94 ns | 1 | 2 | 0 | 0 |
| 95 ns | 1 | 3 | 0 | 1 |
| 94 ns | 2 | 2 | 0 | 0 |
| 91 ns | 1 | 2 | 0 | 0 |
| 88 ns | 1 | 3 | 1 | 0 |
| 85 ns | 1 | 2 | 0 | 0 |
| 83 ns | 1 | 2 | 0 | 0 |
+-----------+-----------+-----------+-----------+-----------+
A total of 50 different delay(s) displayed
Histogram with a maximum of 50 first different delay(s)
+---------------------+--------------------------------------------------+
| Delay | Paths |
+---------------------+--------------------------------------------------+
| [ 83 ns: 96 ns] |------------> 8|
| ] 96 ns: 110 ns] |-------------------> 12|
| ] 110 ns: 124 ns] |-------------------------> 16|
| ] 124 ns: 137 ns] |----------------------------------------> 25|
| ] 137 ns: 151 ns] |------> 4|
| ] 151 ns: 165 ns[ |----> 3|
+---------------------+--------------------------------------------------+
A total of 50 different delay(s) encountered
Place and Route System
Resource utilization and IO cut after routing
Design matrix after routing (U0_M0)
+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+
| | F00| F01| F02| F03| F04| F05| F06| F07| F08| F09| F10| F11|
+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+
| F00| -| .| 11| 1291| 65| 10| 11| .| .| .| .| .|
| F01| .| -| 263| 1343| 1054| 72| .| 144| .| .| .| .|
| F02| 11| 263| -| 1685| 263| 289| .| .| 233| .| .| .|
| F03| 1291| 1343| 1685| -| 345| 271| .| .| .| 199| .| .|
| F04| 65| 1054| 263| 345| -| 1064| .| .| .| .| 43| .|
| F05| 10| 72| 289| 271| 1064| -| .| .| .| .| .| 1335|
| F06| 11| .| .| .| .| .| -| .| .| 54| .| 65|
| F07| .| 144| .| .| .| .| .| -| 94| 10| .| 60|
| F08| .| .| 233| .| .| .| .| 94| -| 44| 37| 1268|
| F09| .| .| .| 199| .| .| 54| 10| 44| -| .| 99|
| F10| .| .| .| .| 43| .| .| .| 37| .| -| 6|
| F11| .| .| .| .| .| 1335| 65| 60| 1268| 99| 6| -|
| Sum| 1388| 2876| 2744| 5134| 2834| 3041| 130| 308| 1676| 406| 86| 2833|
| Sum| 1388| 2876| 2744| 5134| 2834| 3041| 130| 308| 1676| 406| 86| 2833|
+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+
Maximum xDR per component:
+------------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
| | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 |
+------------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
|U0_M0 | 24 | 16 | 24 | 24 | 16 | 32 | 1 | 8 | 16 | 8 | 1 | 32 |
+------------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
View: Target
System Compilation
Size
MODE=virtex8
Chosen part reference for resource evaluation is Ultrascale xcvu440flva2892 .
System size : 12 FPGA
+----------------+------+------+------+------+------+-----+-----+------+
| | REG| LUT|RAMLUT| LUT6| MUXCY| BRAM| DSP| QIWC|
+----------------+------+------+------+------+------+-----+-----+------+
|VIRTEX8 (FPGA) |5,066K|2,533K| 345K|2,533K|2,533K|2,518|2,880|1,049K|
|VIRTEX8 (System)| 61M| 30M|4,138K| 30M| 30M| 30K| 35K| 13M|
+----------------+------+------+------+------+------+-----+-----+------+
Number of hardware modules requested to map the design : 1.
Hardware Configuration
+-------+--------------------------+
| Name | Module |
+-------+--------------------------+
| U0.M0 | orion_xcvu_12c_440_v2 |
+-------+--------------------------+
System compilation
Design size estimation
Design size estimation (only used resources are reported here)
+-------------------------------+------+------+-----+------+-----+------+------------+------------------+-------------------+
|Resource usage |LUT |LUT6 |RAM |REG |DSP |RAMLUT|QIWC_IP_BITS|ZCEI_MESSAGE_INPUT|ZCEI_MESSAGE_OUTPUT|
+-------------------------------+------+------+-----+------+-----+------+------------+------------------+-------------------+
|Estimated size of the design |5,606K|1,515K|2,251|3,037K|1,110|17K |1,736K |20 |20 |
|Board size with user fill-rates|11M |6,079K|18K |9,119K|21K |1,655K|5,662K |5,832 |5,832 |
+-------------------------------+------+------+-----+------+-----+------+------------+------------------+-------------------+
|Computed -> For 1 boards |52.7% |24.9% |12.4%|33.3% |5.4% |1.0% |30.7% |0.3% |0.3% |
| For 2 boards |26.3% |12.5% |6.2% |16.7% |2.7% |0.5% |15.3% |0.2% |0.2% |
| For 3 boards |17.6% |8.3% |4.1% |11.1% |1.8% |0.3% |10.2% |0.1% |0.1% |
| For 4 boards |13.2% |6.2% |3.1% |8.3% |1.3% |0.3% |7.7% |0.1% |0.1% |
| For 5 boards |10.5% |5.0% |2.5% |6.7% |1.1% |0.2% |6.1% |0.1% |0.1% |
+-------------------------------+------+------+-----+------+-----+------+------------+------------------+-------------------+
zCore Compilation : Part_0
Size
MODE=virtex8
Chosen part reference for resource evaluation is Ultrascale xcvu440flva2892 .
System size : 12 FPGA