@@ -518,80 +518,133 @@ int32_t lsm6dsv320x_hg_xl_offset_mg_get(const stmdev_ctx_t *ctx,
518518 */
519519
520520/**
521- * @brief Reset of the device.[set]
521+ * @brief Perform reboot of the device.
522522 *
523523 * @param ctx read / write interface definitions
524- * @param val Reset of the device.
525- * @retval interface status (MANDATORY: return 0 -> no Error)
524+ * @retval 0: reboot has been performed, -1: error
526525 *
527526 */
528- int32_t lsm6dsv320x_reset_set (const stmdev_ctx_t * ctx , lsm6dsv320x_reset_t val )
527+ int32_t lsm6dsv320x_reboot (const stmdev_ctx_t * ctx )
529528{
530- lsm6dsv320x_func_cfg_access_t func_cfg_access ;
531529 lsm6dsv320x_ctrl3_t ctrl3 ;
532530 int32_t ret ;
533531
532+ if (ctx -> mdelay == NULL )
533+ {
534+ ret = -1 ;
535+ goto exit ;
536+ }
537+
534538 ret = lsm6dsv320x_read_reg (ctx , LSM6DSV320X_CTRL3 , (uint8_t * )& ctrl3 , 1 );
535- ret += lsm6dsv320x_read_reg (ctx , LSM6DSV320X_FUNC_CFG_ACCESS , (uint8_t * )& func_cfg_access , 1 );
536539 if (ret != 0 )
537540 {
538- return ret ;
541+ goto exit ;
539542 }
540543
541- ctrl3 .boot = (val == LSM6DSV320X_RESTORE_CAL_PARAM ) ? 1 : 0 ;
542- ctrl3 .sw_reset = (val == LSM6DSV320X_RESTORE_CTRL_REGS ) ? 1 : 0 ;
543- func_cfg_access .sw_por = (val == LSM6DSV320X_GLOBAL_RST ) ? 1 : 0 ;
544+ /* 1. Set the low-g accelerometer, high-g accelerometer, and gyroscope in power-down mode */
545+ ret = lsm6dsv320x_xl_data_rate_set (ctx , LSM6DSV320X_ODR_OFF );
546+ ret += lsm6dsv320x_gy_data_rate_set (ctx , LSM6DSV320X_ODR_OFF );
547+ ret += lsm6dsv320x_hg_xl_data_rate_set (ctx , LSM6DSV320X_HG_XL_ODR_OFF , 0 );
548+ if (ret != 0 )
549+ {
550+ goto exit ;
551+ }
544552
553+ /* 2. Set the BOOT bit of the CTRL3 register to 1. */
554+ ctrl3 .boot = 1 ;
545555 ret = lsm6dsv320x_write_reg (ctx , LSM6DSV320X_CTRL3 , (uint8_t * )& ctrl3 , 1 );
546- ret += lsm6dsv320x_write_reg (ctx , LSM6DSV320X_FUNC_CFG_ACCESS , (uint8_t * )& func_cfg_access , 1 );
556+ if (ret != 0 )
557+ {
558+ goto exit ;
559+ }
547560
561+ /* 3. Wait 30 ms. */
562+ ctx -> mdelay (30 );
563+
564+ exit :
548565 return ret ;
549566}
550567
551568/**
552- * @brief Global reset of the device.[get]
569+ * @brief Perform power-on- reset of the device.
553570 *
554571 * @param ctx read / write interface definitions
555- * @param val Global reset of the device.
556- * @retval interface status (MANDATORY: return 0 -> no Error)
572+ * @retval 0: power-on-reset has been performed, -1: error
557573 *
558574 */
559- int32_t lsm6dsv320x_reset_get (const stmdev_ctx_t * ctx , lsm6dsv320x_reset_t * val )
575+ int32_t lsm6dsv320x_sw_por (const stmdev_ctx_t * ctx )
560576{
561- lsm6dsv320x_func_cfg_access_t func_cfg_access ;
562- lsm6dsv320x_ctrl3_t ctrl3 ;
577+ lsm6dsv320x_func_cfg_access_t func_cfg_access = {0 };
563578 int32_t ret ;
564579
565- ret = lsm6dsv320x_read_reg (ctx , LSM6DSV320X_CTRL3 , (uint8_t * )& ctrl3 , 1 );
566- ret += lsm6dsv320x_read_reg (ctx , LSM6DSV320X_FUNC_CFG_ACCESS , (uint8_t * )& func_cfg_access , 1 );
567- if (ret != 0 )
580+ if (ctx -> mdelay == NULL )
568581 {
569- return ret ;
582+ ret = -1 ;
583+ goto exit ;
570584 }
571585
572- switch ((ctrl3 .sw_reset << 2 ) + (ctrl3 .boot << 1 ) + func_cfg_access .sw_por )
586+ /* 1. Set the SW_POR bit of the FUNC_CFG_ACCESS register to 1. */
587+ func_cfg_access .sw_por = 1 ;
588+ ret = lsm6dsv320x_write_reg (ctx , LSM6DSV320X_FUNC_CFG_ACCESS , (uint8_t * )& func_cfg_access , 1 );
589+ if (ret != 0 )
573590 {
574- case LSM6DSV320X_READY :
575- * val = LSM6DSV320X_READY ;
576- break ;
591+ goto exit ;
592+ }
577593
578- case LSM6DSV320X_GLOBAL_RST :
579- * val = LSM6DSV320X_GLOBAL_RST ;
580- break ;
594+ /* 2. Wait 30 ms. */
595+ ctx -> mdelay (30 );
581596
582- case LSM6DSV320X_RESTORE_CAL_PARAM :
583- * val = LSM6DSV320X_RESTORE_CAL_PARAM ;
584- break ;
597+ exit :
598+ return ret ;
599+ }
585600
586- case LSM6DSV320X_RESTORE_CTRL_REGS :
587- * val = LSM6DSV320X_RESTORE_CTRL_REGS ;
588- break ;
601+ /**
602+ * @brief Perform s/w reset of the device.
603+ *
604+ * @param ctx read / write interface definitions
605+ * @retval 0: s/w reset has been performed, -1: error
606+ *
607+ */
608+ int32_t lsm6dsv320x_sw_reset (const stmdev_ctx_t * ctx )
609+ {
610+ lsm6dsv320x_ctrl3_t ctrl3 = {0 };
611+ uint8_t retry = 0 ;
612+ int32_t ret ;
589613
590- default :
591- * val = LSM6DSV320X_GLOBAL_RST ;
592- break ;
614+ if (ctx -> mdelay == NULL )
615+ {
616+ ret = -1 ;
617+ goto exit ;
593618 }
594619
620+ /* 1. Set the low-g accelerometer, high-g accelerometer, and gyroscope in power-down mode */
621+ ret = lsm6dsv320x_xl_data_rate_set (ctx , LSM6DSV320X_ODR_OFF );
622+ ret += lsm6dsv320x_gy_data_rate_set (ctx , LSM6DSV320X_ODR_OFF );
623+ ret += lsm6dsv320x_hg_xl_data_rate_set (ctx , LSM6DSV320X_HG_XL_ODR_OFF , 0 );
624+ if (ret != 0 )
625+ {
626+ goto exit ;
627+ }
628+
629+ /* 2. Set the SW_RESET bit of the CTRL3 register to 1. */
630+ ctrl3 .sw_reset = 1 ;
631+ ret = lsm6dsv320x_write_reg (ctx , LSM6DSV320X_CTRL3 , (uint8_t * )& ctrl3 , 1 );
632+
633+ /* 3. Poll the SW_RESET bit of the CTRL3 register until it returns to 0. */
634+ do
635+ {
636+ ret += lsm6dsv320x_read_reg (ctx , LSM6DSV320X_CTRL3 , (uint8_t * )& ctrl3 , 1 );
637+ if (ret != 0 )
638+ {
639+ goto exit ;
640+ }
641+
642+ ctx -> mdelay (1 );
643+ } while (ctrl3 .sw_reset == 1 && retry ++ < 3 );
644+
645+ return (ctrl3 .sw_reset == 0 ) ? 0 : -1 ;
646+
647+ exit :
595648 return ret ;
596649}
597650
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