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Patrice Chotard
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ARM: dts: stm32: Sync DT with kernel v6.6-stm32mp-r2-rc6-preint5
Synchronize DT with kernel v6.6-stm32mp-r2-rc6-preint5 Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Change-Id: I2c8ee8eaf1bd6094447a5f03b6e607155002c6a6
1 parent 331bf2f commit 65ae766

59 files changed

Lines changed: 1234 additions & 934 deletions

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‎arch/arm/dts/stm32mp13-pinctrl.dtsi‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -276,6 +276,21 @@
276276
};
277277
};
278278

279+
pwm1_ch3n_pins_a: pwm1-ch3n-0 {
280+
pins {
281+
pinmux = <STM32_PINMUX('E', 12, AF1)>; /* TIM1_CH3N */
282+
bias-pull-down;
283+
drive-push-pull;
284+
slew-rate = <0>;
285+
};
286+
};
287+
288+
pwm1_ch3n_sleep_pins_a: pwm1-ch3n-sleep-0 {
289+
pins {
290+
pinmux = <STM32_PINMUX('E', 12, ANALOG)>; /* TIM1_CH3N */
291+
};
292+
};
293+
279294
pwm3_pins_a: pwm3-0 {
280295
pins {
281296
pinmux = <STM32_PINMUX('B', 1, AF2)>; /* TIM3_CH4 */

‎arch/arm/dts/stm32mp131.dtsi‎

Lines changed: 37 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -161,6 +161,30 @@
161161
interrupt-parent = <&intc>;
162162
ranges;
163163

164+
sram1: sram@30000000 {
165+
compatible = "mmio-sram";
166+
reg = <0x30000000 0x4000>;
167+
#address-cells = <1>;
168+
#size-cells = <1>;
169+
ranges = <0 0x30000000 0x4000>;
170+
};
171+
172+
sram2: sram@30004000 {
173+
compatible = "mmio-sram";
174+
reg = <0x30004000 0x2000>;
175+
#address-cells = <1>;
176+
#size-cells = <1>;
177+
ranges = <0 0x30004000 0x2000>;
178+
};
179+
180+
sram3: sram@30006000 {
181+
compatible = "mmio-sram";
182+
reg = <0x30006000 0x2000>;
183+
#address-cells = <1>;
184+
#size-cells = <1>;
185+
ranges = <0 0x30006000 0x2000>;
186+
};
187+
164188
timers2: timer@40000000 {
165189
#address-cells = <1>;
166190
#size-cells = <0>;
@@ -1134,6 +1158,7 @@
11341158
iwdg2: watchdog@5a002000 {
11351159
compatible = "st,stm32mp1-iwdg";
11361160
reg = <0x5a002000 0x400>;
1161+
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
11371162
clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
11381163
clock-names = "pclk", "lsi";
11391164
status = "disabled";
@@ -1147,6 +1172,15 @@
11471172
status = "disabled";
11481173
};
11491174

1175+
iwdg1: watchdog@5c003000 {
1176+
compatible = "st,stm32mp1-iwdg";
1177+
reg = <0x5c003000 0x400>;
1178+
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1179+
clocks = <&rcc IWDG1>, <&scmi_clk CK_SCMI_LSI>;
1180+
clock-names = "pclk", "lsi";
1181+
status = "disabled";
1182+
};
1183+
11501184
rtc: rtc@5c004000 {
11511185
compatible = "st,stm32mp1-rtc";
11521186
reg = <0x5c004000 0x400>;
@@ -1324,8 +1358,9 @@
13241358
#address-cells = <1>;
13251359
#size-cells = <0>;
13261360
dmas = <&dmamux1 85 0x400 0x01>,
1327-
<&dmamux1 86 0x400 0x01>;
1328-
dma-names = "rx", "tx";
1361+
<&dmamux1 86 0x400 0x01>,
1362+
<&mdma 0 0x3 0x1200000a 0 0>;
1363+
dma-names = "rx", "tx", "rxm2m";
13291364
access-controllers = <&etzpc 19>;
13301365
status = "disabled";
13311366
};

‎arch/arm/dts/stm32mp135f-dk.dts‎

Lines changed: 35 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
#include <dt-bindings/gpio/gpio.h>
1010
#include <dt-bindings/input/input.h>
1111
#include <dt-bindings/leds/common.h>
12+
#include <dt-bindings/pwm/pwm.h>
1213
#include <dt-bindings/rtc/rtc-stm32.h>
1314
#include "stm32mp135.dtsi"
1415
#include "stm32mp13xf.dtsi"
@@ -36,6 +37,7 @@
3637
framebuffer {
3738
compatible = "simple-framebuffer";
3839
clocks = <&rcc LTDC_PX>;
40+
lcd-supply = <&scmi_v3v3_sw>;
3941
status = "disabled";
4042
};
4143
};
@@ -99,10 +101,11 @@
99101
};
100102

101103
panel_backlight: panel-backlight {
102-
compatible = "gpio-backlight";
103-
gpios = <&gpioe 12 GPIO_ACTIVE_HIGH>;
104-
default-on;
105-
default-brightness-level = <1>;
104+
compatible = "pwm-backlight";
105+
pwms = <&pwm1 2 1000000 PWM_POLARITY_INVERTED>;
106+
brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
107+
default-brightness-level = <10>;
108+
power-supply = <&scmi_v3v3_sw>;
106109
status = "okay";
107110
};
108111

@@ -112,6 +115,7 @@
112115
backlight = <&panel_backlight>;
113116
power-supply = <&scmi_v3v3_sw>;
114117
data-mapping = "bgr666";
118+
default-on;
115119
status = "okay";
116120

117121
width-mm = <105>;
@@ -450,23 +454,23 @@
450454
reg = <VOLTD_SCMI_STPMIC1_BUCK4>;
451455
regulator-name = "vddcore";
452456
};
453-
scmi_vdd_adc: regulator@10 {
457+
scmi_vdd_adc: regulator@a {
454458
reg = <VOLTD_SCMI_STPMIC1_LDO1>;
455459
regulator-name = "vdd_adc";
456460
};
457-
scmi_vdd_usb: regulator@13 {
461+
scmi_vdd_usb: regulator@d {
458462
reg = <VOLTD_SCMI_STPMIC1_LDO4>;
459463
regulator-name = "vdd_usb";
460464
};
461-
scmi_vdd_sd: regulator@14 {
465+
scmi_vdd_sd: regulator@e {
462466
reg = <VOLTD_SCMI_STPMIC1_LDO5>;
463467
regulator-name = "vdd_sd";
464468
};
465-
scmi_v1v8_periph: regulator@15 {
469+
scmi_v1v8_periph: regulator@f {
466470
reg = <VOLTD_SCMI_STPMIC1_LDO6>;
467471
regulator-name = "v1v8_periph";
468472
};
469-
scmi_v3v3_sw: regulator@19 {
473+
scmi_v3v3_sw: regulator@13 {
470474
reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>;
471475
regulator-name = "v3v3_sw";
472476
};
@@ -511,9 +515,30 @@
511515
pinctrl-names = "default", "sleep";
512516
pinctrl-0 = <&spi5_pins_a>;
513517
pinctrl-1 = <&spi5_sleep_pins_a>;
518+
sram = <&spi5_dma_pool>;
514519
status = "disabled";
515520
};
516521

522+
&sram2 {
523+
spi5_dma_pool: dma-sram@1000 {
524+
reg = <0x1000 0x1000>;
525+
pool;
526+
};
527+
};
528+
529+
&timers1 {
530+
/* spare dmas for other usage */
531+
/delete-property/dmas;
532+
/delete-property/dma-names;
533+
status = "okay";
534+
pwm1: pwm {
535+
pinctrl-0 = <&pwm1_ch3n_pins_a>;
536+
pinctrl-1 = <&pwm1_ch3n_sleep_pins_a>;
537+
pinctrl-names = "default", "sleep";
538+
status = "okay";
539+
};
540+
};
541+
517542
&timers3 {
518543
/delete-property/dmas;
519544
/delete-property/dma-names;
@@ -625,7 +650,7 @@
625650
bluetooth {
626651
shutdown-gpios = <&mcp23017 13 GPIO_ACTIVE_HIGH>;
627652
compatible = "brcm,bcm43438-bt";
628-
max-speed = <3000000>;
653+
max-speed = <2000000>;
629654
vbat-supply = <&v3v3_ao>;
630655
vddio-supply = <&v3v3_ao>;
631656
};

‎arch/arm/dts/stm32mp13xa.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
1+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
22
/*
33
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
44
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

‎arch/arm/dts/stm32mp13xd.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
1+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
22
/*
33
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
44
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

‎arch/arm/dts/stm32mp15-m4-srm-pinctrl.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
22
/*
33
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
44
* Author: Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.

‎arch/arm/dts/stm32mp15-m4-srm.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
22
/*
33
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
44
* Author: Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.

‎arch/arm/dts/stm32mp151.dtsi‎

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -32,17 +32,10 @@
3232
compatible = "operating-points-v2";
3333
opp-shared;
3434

35-
opp-400000000 {
36-
opp-hz = /bits/ 64 <400000000>;
37-
opp-microvolt = <1200000>;
38-
opp-supported-hw = <0x2>;
39-
opp-suspend;
40-
};
41-
4235
opp-650000000 {
4336
opp-hz = /bits/ 64 <650000000>;
4437
opp-microvolt = <1200000>;
45-
opp-supported-hw = <0x1>;
38+
opp-supported-hw = <0x3>;
4639
};
4740

4841
opp-800000000 {
@@ -596,6 +589,7 @@
596589
iwdg2: watchdog@5a002000 {
597590
compatible = "st,stm32mp1-iwdg";
598591
reg = <0x5a002000 0x400>;
592+
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
599593
clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
600594
clock-names = "pclk", "lsi";
601595
status = "disabled";
@@ -632,6 +626,15 @@
632626
status = "disabled";
633627
};
634628

629+
iwdg1: watchdog@5c003000 {
630+
compatible = "st,stm32mp1-iwdg";
631+
reg = <0x5c003000 0x400>;
632+
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
633+
clocks = <&rcc IWDG1>, <&rcc CK_LSI>;
634+
clock-names = "pclk", "lsi";
635+
status = "disabled";
636+
};
637+
635638
rtc: rtc@5c004000 {
636639
compatible = "st,stm32mp1-rtc";
637640
reg = <0x5c004000 0x400>;
@@ -1399,8 +1402,9 @@
13991402
clocks = <&rcc SPI4_K>;
14001403
resets = <&rcc SPI4_R>;
14011404
dmas = <&dmamux1 83 0x400 0x01>,
1402-
<&dmamux1 84 0x400 0x01>;
1403-
dma-names = "rx", "tx";
1405+
<&dmamux1 84 0x400 0x01>,
1406+
<&mdma1 0 0x3 0x1200000a 0 0>;
1407+
dma-names = "rx", "tx", "rxm2m";
14041408
access-controllers = <&etzpc 53>;
14051409
status = "disabled";
14061410
};

‎arch/arm/dts/stm32mp157a-dk1-scmi.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
22
/*
33
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
44
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

‎arch/arm/dts/stm32mp157a-ed1-scmi.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
1+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
22
/*
33
* Copyright (C) STMicroelectronics 2023 - All Rights Reserved
44
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

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