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2183 lines (1890 loc) · 59.8 KB
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// SPDX-License-Identifier: GPL-2.0
/*
* Driver for VGXY61 global shutter sensor family driver
*
* Copyright (C) 2022 STMicroelectronics SA
*/
#include <linux/version.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#if KERNEL_VERSION(6, 12, 0) > LINUX_VERSION_CODE
#include <asm/unaligned.h>
#else
#include <linux/unaligned.h>
#endif
#include <media/v4l2-async.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-subdev.h>
/* Backward compatibility */
#if KERNEL_VERSION(5, 18, 0) > LINUX_VERSION_CODE
#define MIPI_CSI2_DT_RAW8 0x2a
#define MIPI_CSI2_DT_RAW10 0x2b
#define MIPI_CSI2_DT_RAW12 0x2c
#define MIPI_CSI2_DT_RAW14 0x2d
#define MIPI_CSI2_DT_RAW16 0x2e
#else
#include <media/mipi-csi2.h>
#endif
#if KERNEL_VERSION(5, 15, 0) > LINUX_VERSION_CODE
#define HZ_PER_MHZ 1000000UL
#endif
#if KERNEL_VERSION(5, 6, 0) > LINUX_VERSION_CODE
#define kelvin_to_celsius(t) ((t) - 273)
#else
#include <linux/units.h>
#endif
#if KERNEL_VERSION(5, 7, 0) > LINUX_VERSION_CODE
#define MEDIA_BUS_FMT_Y14_1X14 0x202d
#endif
#define VGXY61_REG_8BIT(n) ((1 << 16) | (n))
#define VGXY61_REG_16BIT(n) ((2 << 16) | (n))
#define VGXY61_REG_32BIT(n) ((4 << 16) | (n))
#define VGXY61_REG_SIZE_SHIFT 16
#define VGXY61_REG_ADDR_MASK 0xffff
#define VGXY61_REG_MODEL_ID VGXY61_REG_16BIT(0x0000)
#define VG5661_MODEL_ID 0x5661
#define VG5761_MODEL_ID 0x5761
#define VGXY61_REG_REVISION VGXY61_REG_16BIT(0x0002)
#define VGXY61_REG_FWPATCH_REVISION VGXY61_REG_16BIT(0x0014)
#define VGXY61_REG_FWPATCH_START_ADDR VGXY61_REG_8BIT(0x2000)
#define VGXY61_REG_SYSTEM_FSM VGXY61_REG_8BIT(0x0020)
#define VGXY61_SYSTEM_FSM_SW_STBY 0x03
#define VGXY61_SYSTEM_FSM_STREAMING 0x04
#define VGXY61_REG_NVM VGXY61_REG_8BIT(0x0023)
#define VGXY61_NVM_OK 0x04
#define VGXY61_REG_THSENS1_TEMPERATURE VGXY61_REG_16BIT(0x0044)
#define VGXY61_REG_STBY VGXY61_REG_8BIT(0x0201)
#define VGXY61_STBY_NO_REQ 0
#define VGXY61_STBY_REQ_TMP_READ BIT(2)
#define VGXY61_REG_STREAMING VGXY61_REG_8BIT(0x0202)
#define VGXY61_STREAMING_NO_REQ 0
#define VGXY61_STREAMING_REQ_STOP BIT(0)
#define VGXY61_STREAMING_REQ_START BIT(1)
#define VGXY61_REG_EXT_CLOCK VGXY61_REG_32BIT(0x0220)
#define VGXY61_REG_CLK_PLL_PREDIV VGXY61_REG_8BIT(0x0224)
#define VGXY61_REG_CLK_SYS_PLL_MULT VGXY61_REG_8BIT(0x0225)
#define VGXY61_REG_GPIO_0_CTRL VGXY61_REG_8BIT(0x0236)
#define VGXY61_REG_GPIO_1_CTRL VGXY61_REG_8BIT(0x0237)
#define VGXY61_REG_GPIO_2_CTRL VGXY61_REG_8BIT(0x0238)
#define VGXY61_REG_GPIO_3_CTRL VGXY61_REG_8BIT(0x0239)
#define VGXY61_REG_SIGNALS_POLARITY_CTRL VGXY61_REG_8BIT(0x023b)
#define VGXY61_REG_LINE_LENGTH VGXY61_REG_16BIT(0x0300)
#define VGXY61_REG_ORIENTATION VGXY61_REG_8BIT(0x0302)
#define VGXY61_REG_VT_CTRL VGXY61_REG_8BIT(0x0304)
#define VGXY61_REG_FORMAT_CTRL VGXY61_REG_8BIT(0x0305)
#define VGXY61_REG_OIF_CTRL VGXY61_REG_16BIT(0x0306)
#define VGXY61_REG_OIF_ROI0_CTRL VGXY61_REG_8BIT(0x030a)
#define VGXY61_REG_ROI0_START_H VGXY61_REG_16BIT(0x0400)
#define VGXY61_REG_ROI0_START_V VGXY61_REG_16BIT(0x0402)
#define VGXY61_REG_ROI0_END_H VGXY61_REG_16BIT(0x0404)
#define VGXY61_REG_ROI0_END_V VGXY61_REG_16BIT(0x0406)
#define VGXY61_REG_PATGEN_CTRL VGXY61_REG_32BIT(0x0440)
#define VGXY61_PATGEN_LONG_ENABLE BIT(16)
#define VGXY61_PATGEN_SHORT_ENABLE BIT(0)
#define VGXY61_PATGEN_LONG_TYPE_SHIFT 18
#define VGXY61_PATGEN_SHORT_TYPE_SHIFT 4
#define VGXY61_REG_FRAME_CONTENT_CTRL VGXY61_REG_8BIT(0x0478)
#define VGXY61_REG_COARSE_EXPOSURE_LONG VGXY61_REG_16BIT(0x0500)
#define VGXY61_REG_COARSE_EXPOSURE_SHORT VGXY61_REG_16BIT(0x0504)
#define VGXY61_REG_ANALOG_GAIN VGXY61_REG_8BIT(0x0508)
#define VGXY61_REG_DIGITAL_GAIN_LONG VGXY61_REG_16BIT(0x050a)
#define VGXY61_REG_DIGITAL_GAIN_SHORT VGXY61_REG_16BIT(0x0512)
#define VGXY61_REG_FRAME_LENGTH VGXY61_REG_16BIT(0x051a)
#define VGXY61_REG_SIGNALS_CTRL VGXY61_REG_16BIT(0x0522)
#define VGXY61_SIGNALS_GPIO_ID_SHIFT 4
#define VGXY61_REG_READOUT_CTRL VGXY61_REG_8BIT(0x0530)
#define VGXY61_REG_HDR_CTRL VGXY61_REG_8BIT(0x0532)
#define VGXY61_REG_PATGEN_LONG_DATA_GR VGXY61_REG_16BIT(0x092c)
#define VGXY61_REG_PATGEN_LONG_DATA_R VGXY61_REG_16BIT(0x092e)
#define VGXY61_REG_PATGEN_LONG_DATA_B VGXY61_REG_16BIT(0x0930)
#define VGXY61_REG_PATGEN_LONG_DATA_GB VGXY61_REG_16BIT(0x0932)
#define VGXY61_REG_PATGEN_SHORT_DATA_GR VGXY61_REG_16BIT(0x0950)
#define VGXY61_REG_PATGEN_SHORT_DATA_R VGXY61_REG_16BIT(0x0952)
#define VGXY61_REG_PATGEN_SHORT_DATA_B VGXY61_REG_16BIT(0x0954)
#define VGXY61_REG_PATGEN_SHORT_DATA_GB VGXY61_REG_16BIT(0x0956)
#define VGXY61_REG_BYPASS_CTRL VGXY61_REG_8BIT(0x0a60)
#define VGX661_WIDTH 1464
#define VGX661_HEIGHT 1104
#define VGX761_WIDTH 1944
#define VGX761_HEIGHT 1204
#define VGX661_DEFAULT_MODE 1
#define VGX761_DEFAULT_MODE 1
#define VGX661_SHORT_ROT_TERM 93
#define VGX761_SHORT_ROT_TERM 90
#define VGXY61_EXPOS_ROT_TERM 66
#define VGXY61_WRITE_MULTIPLE_CHUNK_MAX 16
#define VGXY61_NB_GPIOS 4
#define VGXY61_NB_POLARITIES 5
#define VGXY61_FRAME_LENGTH_DEF 1313
#define VGXY61_MIN_FRAME_LENGTH 1288
#define VGXY61_MIN_EXPOSURE 10
#define VGXY61_HDR_LINEAR_RATIO 10
#define VGXY61_TIMEOUT_MS 500
#define VGXY61_MEDIA_BUS_FMT_DEF MEDIA_BUS_FMT_Y8_1X8
#define VGXY61_FWPATCH_REVISION_MAJOR 2
#define VGXY61_FWPATCH_REVISION_MINOR 0
#define VGXY61_FWPATCH_REVISION_MICRO 5
#define V4L2_CID_TEMPERATURE (V4L2_CID_USER_BASE | 0x1020)
#if KERNEL_VERSION(6, 2, 0) > LINUX_VERSION_CODE
#define V4L2_CID_HDR_SENSOR_MODE (V4L2_CID_USER_BASE | 0x1004)
#define MEDIA_BUS_FMT_Y16_1X16 0x202e
#endif
static const u8 patch_array[] = {
0xbf, 0x00, 0x05, 0x20, 0x06, 0x01, 0xe0, 0xe0, 0x04, 0x80, 0xe6, 0x45,
0xed, 0x6f, 0xfe, 0xff, 0x14, 0x80, 0x1f, 0x84, 0x10, 0x42, 0x05, 0x7c,
0x01, 0xc4, 0x1e, 0x80, 0xb6, 0x42, 0x00, 0xe0, 0x1e, 0x82, 0x1e, 0xc0,
0x93, 0xdd, 0xc3, 0xc1, 0x0c, 0x04, 0x00, 0xfa, 0x86, 0x0d, 0x70, 0xe1,
0x04, 0x98, 0x15, 0x00, 0x28, 0xe0, 0x14, 0x02, 0x08, 0xfc, 0x15, 0x40,
0x28, 0xe0, 0x98, 0x58, 0xe0, 0xef, 0x04, 0x98, 0x0e, 0x04, 0x00, 0xf0,
0x15, 0x00, 0x28, 0xe0, 0x19, 0xc8, 0x15, 0x40, 0x28, 0xe0, 0xc6, 0x41,
0xfc, 0xe0, 0x14, 0x80, 0x1f, 0x84, 0x14, 0x02, 0xa0, 0xfc, 0x1e, 0x80,
0x14, 0x80, 0x14, 0x02, 0x80, 0xfb, 0x14, 0x02, 0xe0, 0xfc, 0x1e, 0x80,
0x14, 0xc0, 0x1f, 0x84, 0x14, 0x02, 0xa4, 0xfc, 0x1e, 0xc0, 0x14, 0xc0,
0x14, 0x02, 0x80, 0xfb, 0x14, 0x02, 0xe4, 0xfc, 0x1e, 0xc0, 0x0c, 0x0c,
0x00, 0xf2, 0x93, 0xdd, 0x86, 0x00, 0xf8, 0xe0, 0x04, 0x80, 0xc6, 0x03,
0x70, 0xe1, 0x0e, 0x84, 0x93, 0xdd, 0xc3, 0xc1, 0x0c, 0x04, 0x00, 0xfa,
0x6b, 0x80, 0x06, 0x40, 0x6c, 0xe1, 0x04, 0x80, 0x09, 0x00, 0xe0, 0xe0,
0x0b, 0xa1, 0x95, 0x84, 0x05, 0x0c, 0x1c, 0xe0, 0x86, 0x02, 0xf9, 0x60,
0xe0, 0xcf, 0x78, 0x6e, 0x80, 0xef, 0x25, 0x0c, 0x18, 0xe0, 0x05, 0x4c,
0x1c, 0xe0, 0x86, 0x02, 0xf9, 0x60, 0xe0, 0xcf, 0x0b, 0x84, 0xd8, 0x6d,
0x80, 0xef, 0x05, 0x4c, 0x18, 0xe0, 0x04, 0xd8, 0x0b, 0xa5, 0x95, 0x84,
0x05, 0x0c, 0x2c, 0xe0, 0x06, 0x02, 0x01, 0x60, 0xe0, 0xce, 0x18, 0x6d,
0x80, 0xef, 0x25, 0x0c, 0x30, 0xe0, 0x05, 0x4c, 0x2c, 0xe0, 0x06, 0x02,
0x01, 0x60, 0xe0, 0xce, 0x0b, 0x84, 0x78, 0x6c, 0x80, 0xef, 0x05, 0x4c,
0x30, 0xe0, 0x0c, 0x0c, 0x00, 0xf2, 0x93, 0xdd, 0x46, 0x01, 0x70, 0xe1,
0x08, 0x80, 0x0b, 0xa1, 0x08, 0x5c, 0x00, 0xda, 0x06, 0x01, 0x68, 0xe1,
0x04, 0x80, 0x4a, 0x40, 0x84, 0xe0, 0x08, 0x5c, 0x00, 0x9a, 0x06, 0x01,
0xe0, 0xe0, 0x04, 0x80, 0x15, 0x00, 0x60, 0xe0, 0x19, 0xc4, 0x15, 0x40,
0x60, 0xe0, 0x15, 0x00, 0x78, 0xe0, 0x19, 0xc4, 0x15, 0x40, 0x78, 0xe0,
0x93, 0xdd, 0xc3, 0xc1, 0x46, 0x01, 0x70, 0xe1, 0x08, 0x80, 0x0b, 0xa1,
0x08, 0x5c, 0x00, 0xda, 0x06, 0x01, 0x68, 0xe1, 0x04, 0x80, 0x4a, 0x40,
0x84, 0xe0, 0x08, 0x5c, 0x00, 0x9a, 0x06, 0x01, 0xe0, 0xe0, 0x14, 0x80,
0x25, 0x02, 0x54, 0xe0, 0x29, 0xc4, 0x25, 0x42, 0x54, 0xe0, 0x24, 0x80,
0x35, 0x04, 0x6c, 0xe0, 0x39, 0xc4, 0x35, 0x44, 0x6c, 0xe0, 0x25, 0x02,
0x64, 0xe0, 0x29, 0xc4, 0x25, 0x42, 0x64, 0xe0, 0x04, 0x80, 0x15, 0x00,
0x7c, 0xe0, 0x19, 0xc4, 0x15, 0x40, 0x7c, 0xe0, 0x93, 0xdd, 0xc3, 0xc1,
0x4c, 0x04, 0x7c, 0xfa, 0x86, 0x40, 0x98, 0xe0, 0x14, 0x80, 0x1b, 0xa1,
0x06, 0x00, 0x00, 0xc0, 0x08, 0x42, 0x38, 0xdc, 0x08, 0x64, 0xa0, 0xef,
0x86, 0x42, 0x3c, 0xe0, 0x68, 0x49, 0x80, 0xef, 0x6b, 0x80, 0x78, 0x53,
0xc8, 0xef, 0xc6, 0x54, 0x6c, 0xe1, 0x7b, 0x80, 0xb5, 0x14, 0x0c, 0xf8,
0x05, 0x14, 0x14, 0xf8, 0x1a, 0xac, 0x8a, 0x80, 0x0b, 0x90, 0x38, 0x55,
0x80, 0xef, 0x1a, 0xae, 0x17, 0xc2, 0x03, 0x82, 0x88, 0x65, 0x80, 0xef,
0x1b, 0x80, 0x0b, 0x8e, 0x68, 0x65, 0x80, 0xef, 0x9b, 0x80, 0x0b, 0x8c,
0x08, 0x65, 0x80, 0xef, 0x6b, 0x80, 0x0b, 0x92, 0x1b, 0x8c, 0x98, 0x64,
0x80, 0xef, 0x1a, 0xec, 0x9b, 0x80, 0x0b, 0x90, 0x95, 0x54, 0x10, 0xe0,
0xa8, 0x53, 0x80, 0xef, 0x1a, 0xee, 0x17, 0xc2, 0x03, 0x82, 0xf8, 0x63,
0x80, 0xef, 0x1b, 0x80, 0x0b, 0x8e, 0xd8, 0x63, 0x80, 0xef, 0x1b, 0x8c,
0x68, 0x63, 0x80, 0xef, 0x6b, 0x80, 0x0b, 0x92, 0x65, 0x54, 0x14, 0xe0,
0x08, 0x65, 0x84, 0xef, 0x68, 0x63, 0x80, 0xef, 0x7b, 0x80, 0x0b, 0x8c,
0xa8, 0x64, 0x84, 0xef, 0x08, 0x63, 0x80, 0xef, 0x14, 0xe8, 0x46, 0x44,
0x94, 0xe1, 0x24, 0x88, 0x4a, 0x4e, 0x04, 0xe0, 0x14, 0xea, 0x1a, 0x04,
0x08, 0xe0, 0x0a, 0x40, 0x84, 0xed, 0x0c, 0x04, 0x00, 0xe2, 0x4a, 0x40,
0x04, 0xe0, 0x19, 0x16, 0xc0, 0xe0, 0x0a, 0x40, 0x84, 0xed, 0x21, 0x54,
0x60, 0xe0, 0x0c, 0x04, 0x00, 0xe2, 0x1b, 0xa5, 0x0e, 0xea, 0x01, 0x89,
0x21, 0x54, 0x64, 0xe0, 0x7e, 0xe8, 0x65, 0x82, 0x1b, 0xa7, 0x26, 0x00,
0x00, 0x80, 0xa5, 0x82, 0x1b, 0xa9, 0x65, 0x82, 0x1b, 0xa3, 0x01, 0x85,
0x16, 0x00, 0x00, 0xc0, 0x01, 0x54, 0x04, 0xf8, 0x06, 0xaa, 0x01, 0x83,
0x06, 0xa8, 0x65, 0x81, 0x06, 0xa8, 0x01, 0x54, 0x04, 0xf8, 0x01, 0x83,
0x06, 0xaa, 0x09, 0x14, 0x18, 0xf8, 0x0b, 0xa1, 0x05, 0x84, 0xc6, 0x42,
0xd4, 0xe0, 0x14, 0x84, 0x01, 0x83, 0x01, 0x54, 0x60, 0xe0, 0x01, 0x54,
0x64, 0xe0, 0x0b, 0x02, 0x90, 0xe0, 0x10, 0x02, 0x90, 0xe5, 0x01, 0x54,
0x88, 0xe0, 0xb5, 0x81, 0xc6, 0x40, 0xd4, 0xe0, 0x14, 0x80, 0x0b, 0x02,
0xe0, 0xe4, 0x10, 0x02, 0x31, 0x66, 0x02, 0xc0, 0x01, 0x54, 0x88, 0xe0,
0x1a, 0x84, 0x29, 0x14, 0x10, 0xe0, 0x1c, 0xaa, 0x2b, 0xa1, 0xf5, 0x82,
0x25, 0x14, 0x10, 0xf8, 0x2b, 0x04, 0xa8, 0xe0, 0x20, 0x44, 0x0d, 0x70,
0x03, 0xc0, 0x2b, 0xa1, 0x04, 0x00, 0x80, 0x9a, 0x02, 0x40, 0x84, 0x90,
0x03, 0x54, 0x04, 0x80, 0x4c, 0x0c, 0x7c, 0xf2, 0x93, 0xdd, 0x00, 0x00,
0x02, 0xa9, 0x00, 0x00, 0x64, 0x4a, 0x40, 0x00, 0x08, 0x2d, 0x58, 0xe0,
0xa8, 0x98, 0x40, 0x00, 0x28, 0x07, 0x34, 0xe0, 0x05, 0xb9, 0x00, 0x00,
0x28, 0x00, 0x41, 0x05, 0x88, 0x00, 0x41, 0x3c, 0x98, 0x00, 0x41, 0x52,
0x04, 0x01, 0x41, 0x79, 0x3c, 0x01, 0x41, 0x6a, 0x3d, 0xfe, 0x00, 0x00,
};
static const char * const vgxy61_test_pattern_menu[] = {
"Disabled",
"Solid",
"Colorbar",
"Gradbar",
"Hgrey",
"Vgrey",
"Dgrey",
"PN28",
};
static const char * const vgxy61_hdr_mode_menu[] = {
"HDR linearize",
"HDR subtraction",
"No HDR",
};
static const char * const vgxy61_supply_name[] = {
"VCORE",
"VDDIO",
"VANA",
};
static const s64 link_freq[] = {
/*
* MIPI output freq is 804Mhz / 2, as it uses both rising edge and
* falling edges to send data
*/
402000000ULL
};
enum vgxy61_bin_mode {
VGXY61_BIN_MODE_NORMAL,
VGXY61_BIN_MODE_DIGITAL_X2,
VGXY61_BIN_MODE_DIGITAL_X4,
};
enum vgxy61_hdr_mode {
VGXY61_HDR_LINEAR,
VGXY61_HDR_SUB,
VGXY61_NO_HDR,
};
enum vgxy61_strobe_mode {
VGXY61_STROBE_DISABLED,
VGXY61_STROBE_LONG,
VGXY61_STROBE_ENABLED,
};
struct vgxy61_mode_info {
u32 width;
u32 height;
enum vgxy61_bin_mode bin_mode;
struct v4l2_rect crop;
};
struct vgxy61_fmt_desc {
u32 code;
u8 bpp;
u8 data_type;
};
static const struct vgxy61_fmt_desc vgxy61_supported_codes[] = {
{
.code = MEDIA_BUS_FMT_Y8_1X8,
.bpp = 8,
.data_type = MIPI_CSI2_DT_RAW8,
},
{
.code = MEDIA_BUS_FMT_Y10_1X10,
.bpp = 10,
.data_type = MIPI_CSI2_DT_RAW10,
},
{
.code = MEDIA_BUS_FMT_Y12_1X12,
.bpp = 12,
.data_type = MIPI_CSI2_DT_RAW12,
},
{
.code = MEDIA_BUS_FMT_Y14_1X14,
.bpp = 14,
.data_type = MIPI_CSI2_DT_RAW14,
},
{
.code = MEDIA_BUS_FMT_Y16_1X16,
.bpp = 16,
.data_type = MIPI_CSI2_DT_RAW16,
},
};
static const struct vgxy61_mode_info vgx661_mode_data[] = {
{
.width = VGX661_WIDTH,
.height = VGX661_HEIGHT,
.bin_mode = VGXY61_BIN_MODE_NORMAL,
.crop = {
.left = 0,
.top = 0,
.width = VGX661_WIDTH,
.height = VGX661_HEIGHT,
},
},
{
.width = 1280,
.height = 720,
.bin_mode = VGXY61_BIN_MODE_NORMAL,
.crop = {
.left = 92,
.top = 192,
.width = 1280,
.height = 720,
},
},
{
.width = 640,
.height = 480,
.bin_mode = VGXY61_BIN_MODE_DIGITAL_X2,
.crop = {
.left = 92,
.top = 72,
.width = 1280,
.height = 960,
},
},
{
.width = 320,
.height = 240,
.bin_mode = VGXY61_BIN_MODE_DIGITAL_X4,
.crop = {
.left = 92,
.top = 72,
.width = 1280,
.height = 960,
},
},
};
static const struct vgxy61_mode_info vgx761_mode_data[] = {
{
.width = VGX761_WIDTH,
.height = VGX761_HEIGHT,
.bin_mode = VGXY61_BIN_MODE_NORMAL,
.crop = {
.left = 0,
.top = 0,
.width = VGX761_WIDTH,
.height = VGX761_HEIGHT,
},
},
{
.width = 1920,
.height = 1080,
.bin_mode = VGXY61_BIN_MODE_NORMAL,
.crop = {
.left = 12,
.top = 62,
.width = 1920,
.height = 1080,
},
},
{
.width = 1280,
.height = 720,
.bin_mode = VGXY61_BIN_MODE_NORMAL,
.crop = {
.left = 332,
.top = 242,
.width = 1280,
.height = 720,
},
},
{
.width = 640,
.height = 480,
.bin_mode = VGXY61_BIN_MODE_DIGITAL_X2,
.crop = {
.left = 332,
.top = 122,
.width = 1280,
.height = 960,
},
},
{
.width = 320,
.height = 240,
.bin_mode = VGXY61_BIN_MODE_DIGITAL_X4,
.crop = {
.left = 332,
.top = 122,
.width = 1280,
.height = 960,
},
},
};
struct vgxy61_dev {
struct i2c_client *i2c_client;
struct v4l2_subdev sd;
struct media_pad pad;
struct regulator_bulk_data supplies[ARRAY_SIZE(vgxy61_supply_name)];
struct gpio_desc *reset_gpio;
struct clk *xclk;
u32 clk_freq;
u16 id;
u16 sensor_width;
u16 sensor_height;
u16 oif_ctrl;
unsigned int nb_of_lane;
u32 data_rate_in_mbps;
u32 pclk;
u16 line_length;
u16 rot_term;
bool gpios_polarity;
/* Lock to protect all members below */
struct mutex lock;
struct v4l2_ctrl_handler ctrl_handler;
struct v4l2_ctrl *pixel_rate_ctrl;
struct v4l2_ctrl *expo_ctrl;
struct v4l2_ctrl *vblank_ctrl;
struct v4l2_ctrl *vflip_ctrl;
struct v4l2_ctrl *hflip_ctrl;
bool streaming;
struct v4l2_mbus_framefmt fmt;
const struct vgxy61_mode_info *sensor_modes;
unsigned int sensor_modes_nb;
const struct vgxy61_mode_info *default_mode;
const struct vgxy61_mode_info *current_mode;
bool hflip;
bool vflip;
enum vgxy61_hdr_mode hdr;
u16 expo_long;
u16 expo_short;
u16 expo_max;
u16 expo_min;
u16 vblank;
u16 vblank_min;
u16 frame_length;
u16 digital_gain;
u8 analog_gain;
enum vgxy61_strobe_mode strobe_mode;
u32 pattern;
};
static u8 get_bpp_by_code(__u32 code)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE(vgxy61_supported_codes); i++) {
if (vgxy61_supported_codes[i].code == code)
return vgxy61_supported_codes[i].bpp;
}
/* Should never happen */
WARN(1, "Unsupported code %d. default to 8 bpp", code);
return 8;
}
static u8 get_data_type_by_code(__u32 code)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE(vgxy61_supported_codes); i++) {
if (vgxy61_supported_codes[i].code == code)
return vgxy61_supported_codes[i].data_type;
}
/* Should never happen */
WARN(1, "Unsupported code %d. default to MIPI_CSI2_DT_RAW8 data type",
code);
return MIPI_CSI2_DT_RAW8;
}
static void compute_pll_parameters_by_freq(u32 freq, u8 *prediv, u8 *mult)
{
const unsigned int predivs[] = {1, 2, 4};
unsigned int i;
/*
* Freq range is [6Mhz-27Mhz] already checked.
* Output of divider should be in [6Mhz-12Mhz[.
*/
for (i = 0; i < ARRAY_SIZE(predivs); i++) {
*prediv = predivs[i];
if (freq / *prediv < 12 * HZ_PER_MHZ)
break;
}
WARN_ON(i == ARRAY_SIZE(predivs));
/*
* Target freq is 804Mhz. Don't change this as it will impact image
* quality.
*/
*mult = ((804 * HZ_PER_MHZ) * (*prediv) + freq / 2) / freq;
}
static s32 get_pixel_rate(struct vgxy61_dev *sensor)
{
return div64_u64((u64)sensor->data_rate_in_mbps * sensor->nb_of_lane,
get_bpp_by_code(sensor->fmt.code));
}
static inline struct vgxy61_dev *to_vgxy61_dev(struct v4l2_subdev *sd)
{
return container_of(sd, struct vgxy61_dev, sd);
}
static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
{
return &container_of(ctrl->handler, struct vgxy61_dev,
ctrl_handler)->sd;
}
static unsigned int get_chunk_size(struct vgxy61_dev *sensor)
{
struct i2c_adapter *adapter = sensor->i2c_client->adapter;
int max_write_len = VGXY61_WRITE_MULTIPLE_CHUNK_MAX;
if (adapter->quirks && adapter->quirks->max_write_len)
max_write_len = adapter->quirks->max_write_len - 2;
max_write_len = min(max_write_len, VGXY61_WRITE_MULTIPLE_CHUNK_MAX);
return max(max_write_len, 1);
}
static int vgxy61_read_multiple(struct vgxy61_dev *sensor, u32 reg,
unsigned int len)
{
struct i2c_client *client = sensor->i2c_client;
struct i2c_msg msg[2];
u8 buf[2];
u8 val[sizeof(u32)] = {0};
int ret;
if (len > sizeof(u32))
return -EINVAL;
buf[0] = reg >> 8;
buf[1] = reg & 0xff;
msg[0].addr = client->addr;
msg[0].flags = client->flags;
msg[0].buf = buf;
msg[0].len = sizeof(buf);
msg[1].addr = client->addr;
msg[1].flags = client->flags | I2C_M_RD;
msg[1].buf = val;
msg[1].len = len;
ret = i2c_transfer(client->adapter, msg, 2);
if (ret < 0) {
dev_dbg(&client->dev, "%s: %x i2c_transfer, reg: %x => %d\n",
__func__, client->addr, reg, ret);
return ret;
}
return get_unaligned_le32(val);
}
static inline int vgxy61_read_reg(struct vgxy61_dev *sensor, u32 reg)
{
return vgxy61_read_multiple(sensor, reg & VGXY61_REG_ADDR_MASK,
(reg >> VGXY61_REG_SIZE_SHIFT) & 7);
}
static int vgxy61_write_multiple(struct vgxy61_dev *sensor, u32 reg,
const u8 *data, unsigned int len, int *err)
{
struct i2c_client *client = sensor->i2c_client;
struct i2c_msg msg;
u8 buf[VGXY61_WRITE_MULTIPLE_CHUNK_MAX + 2];
unsigned int i;
int ret;
if (err && *err)
return *err;
if (len > VGXY61_WRITE_MULTIPLE_CHUNK_MAX)
return -EINVAL;
buf[0] = reg >> 8;
buf[1] = reg & 0xff;
for (i = 0; i < len; i++)
buf[i + 2] = data[i];
msg.addr = client->addr;
msg.flags = client->flags;
msg.buf = buf;
msg.len = len + 2;
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret < 0) {
dev_dbg(&client->dev, "%s: i2c_transfer, reg: %x => %d\n",
__func__, reg, ret);
if (err)
*err = ret;
return ret;
}
return 0;
}
static int vgxy61_write_array(struct vgxy61_dev *sensor, u32 reg,
unsigned int nb, const u8 *array)
{
const unsigned int chunk_size = get_chunk_size(sensor);
int ret;
unsigned int sz;
while (nb) {
sz = min(nb, chunk_size);
ret = vgxy61_write_multiple(sensor, reg, array, sz, NULL);
if (ret < 0)
return ret;
nb -= sz;
reg += sz;
array += sz;
}
return 0;
}
static inline int vgxy61_write_reg(struct vgxy61_dev *sensor, u32 reg, u32 val,
int *err)
{
return vgxy61_write_multiple(sensor, reg & VGXY61_REG_ADDR_MASK,
(u8 *)&val,
(reg >> VGXY61_REG_SIZE_SHIFT) & 7, err);
}
static int vgxy61_poll_reg(struct vgxy61_dev *sensor, u32 reg, u8 poll_val,
unsigned int timeout_ms)
{
const unsigned int loop_delay_ms = 10;
int ret;
#if KERNEL_VERSION(5, 7, 0) > LINUX_VERSION_CODE
int loop_nb = timeout_ms / loop_delay_ms;
while (--loop_nb) {
ret = vgxy61_read_reg(sensor, reg);
if (ret < 0)
return ret;
if (ret == poll_val)
return 0;
msleep(loop_delay_ms);
}
return -ETIMEDOUT;
#else
return read_poll_timeout(vgxy61_read_reg, ret,
((ret < 0) || (ret == poll_val)),
loop_delay_ms * 1000, timeout_ms * 1000,
false, sensor, reg);
#endif
}
static int vgxy61_wait_state(struct vgxy61_dev *sensor, int state,
unsigned int timeout_ms)
{
return vgxy61_poll_reg(sensor, VGXY61_REG_SYSTEM_FSM, state,
timeout_ms);
}
static int vgxy61_check_bw(struct vgxy61_dev *sensor)
{
/*
* Simplification of time needed to send short packets and for the MIPI
* to add transition times (EoT, LPS, and SoT packet delimiters) needed
* by the protocol to go in low power between 2 packets of data. This
* is a mipi IP constant for the sensor.
*/
const unsigned int mipi_margin = 1056;
unsigned int binning_scale = sensor->current_mode->crop.height /
sensor->current_mode->height;
u8 bpp = get_bpp_by_code(sensor->fmt.code);
unsigned int max_bit_per_line;
unsigned int bit_per_line;
u64 line_rate;
line_rate = sensor->nb_of_lane * (u64)sensor->data_rate_in_mbps *
sensor->line_length;
max_bit_per_line = div64_u64(line_rate, sensor->pclk) - mipi_margin;
bit_per_line = (bpp * sensor->current_mode->width) / binning_scale;
return bit_per_line > max_bit_per_line ? -EINVAL : 0;
}
static int vgxy61_apply_exposure(struct vgxy61_dev *sensor)
{
int ret = 0;
/* We first set expo to zero to avoid forbidden parameters couple */
vgxy61_write_reg(sensor, VGXY61_REG_COARSE_EXPOSURE_SHORT, 0, &ret);
vgxy61_write_reg(sensor, VGXY61_REG_COARSE_EXPOSURE_LONG,
sensor->expo_long, &ret);
vgxy61_write_reg(sensor, VGXY61_REG_COARSE_EXPOSURE_SHORT,
sensor->expo_short, &ret);
return ret;
}
static int vgxy61_get_regulators(struct vgxy61_dev *sensor)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE(vgxy61_supply_name); i++)
sensor->supplies[i].supply = vgxy61_supply_name[i];
return devm_regulator_bulk_get(&sensor->i2c_client->dev,
ARRAY_SIZE(vgxy61_supply_name),
sensor->supplies);
}
static void vgxy61_apply_reset(struct vgxy61_dev *sensor)
{
gpiod_set_value_cansleep(sensor->reset_gpio, 0);
usleep_range(5000, 10000);
gpiod_set_value_cansleep(sensor->reset_gpio, 1);
usleep_range(5000, 10000);
gpiod_set_value_cansleep(sensor->reset_gpio, 0);
usleep_range(40000, 100000);
}
static void vgxy61_fill_framefmt(struct vgxy61_dev *sensor,
const struct vgxy61_mode_info *mode,
struct v4l2_mbus_framefmt *fmt, u32 code)
{
fmt->code = code;
fmt->width = mode->width;
fmt->height = mode->height;
fmt->colorspace = V4L2_COLORSPACE_RAW;
fmt->field = V4L2_FIELD_NONE;
fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
}
static int vgxy61_try_fmt_internal(struct v4l2_subdev *sd,
struct v4l2_mbus_framefmt *fmt,
const struct vgxy61_mode_info **new_mode)
{
struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
const struct vgxy61_mode_info *mode = sensor->sensor_modes;
unsigned int index;
for (index = 0; index < ARRAY_SIZE(vgxy61_supported_codes); index++) {
if (vgxy61_supported_codes[index].code == fmt->code)
break;
}
if (index == ARRAY_SIZE(vgxy61_supported_codes))
index = 0;
mode = v4l2_find_nearest_size(sensor->sensor_modes,
sensor->sensor_modes_nb, width, height,
fmt->width, fmt->height);
if (new_mode)
*new_mode = mode;
vgxy61_fill_framefmt(sensor, mode, fmt,
vgxy61_supported_codes[index].code);
return 0;
}
#if KERNEL_VERSION(5, 14, 0) > LINUX_VERSION_CODE
static int vgxy61_get_selection(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_selection *sel)
#else
static int vgxy61_get_selection(struct v4l2_subdev *sd,
struct v4l2_subdev_state *sd_state,
struct v4l2_subdev_selection *sel)
#endif
{
struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
switch (sel->target) {
case V4L2_SEL_TGT_CROP:
sel->r = sensor->current_mode->crop;
return 0;
case V4L2_SEL_TGT_NATIVE_SIZE:
case V4L2_SEL_TGT_CROP_DEFAULT:
case V4L2_SEL_TGT_CROP_BOUNDS:
sel->r.top = 0;
sel->r.left = 0;
sel->r.width = sensor->sensor_width;
sel->r.height = sensor->sensor_height;
return 0;
}
return -EINVAL;
}
#if KERNEL_VERSION(5, 14, 0) > LINUX_VERSION_CODE
static int vgxy61_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
#else
static int vgxy61_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_state *sd_state,
struct v4l2_subdev_mbus_code_enum *code)
#endif
{
if (code->index >= ARRAY_SIZE(vgxy61_supported_codes))
return -EINVAL;
code->code = vgxy61_supported_codes[code->index].code;
return 0;
}
#if KERNEL_VERSION(5, 14, 0) > LINUX_VERSION_CODE
static int vgxy61_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
#else
static int vgxy61_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_state *sd_state,
struct v4l2_subdev_format *format)
#endif
{
struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
struct v4l2_mbus_framefmt *fmt;
mutex_lock(&sensor->lock);
if (format->which == V4L2_SUBDEV_FORMAT_TRY)
#if KERNEL_VERSION(5, 14, 0) > LINUX_VERSION_CODE
fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg, format->pad);
#elif KERNEL_VERSION(6, 8, 0) > LINUX_VERSION_CODE
fmt = v4l2_subdev_get_try_format(&sensor->sd, sd_state,
format->pad);
#else
fmt = v4l2_subdev_state_get_format(sd_state, format->pad);
#endif
else
fmt = &sensor->fmt;
format->format = *fmt;
mutex_unlock(&sensor->lock);
return 0;
}
static u16 vgxy61_get_vblank_min(struct vgxy61_dev *sensor,
enum vgxy61_hdr_mode hdr)
{
u16 min_vblank = VGXY61_MIN_FRAME_LENGTH -
sensor->current_mode->crop.height;
/* Ensure the first rule of thumb can't be negative */
u16 min_vblank_hdr = VGXY61_MIN_EXPOSURE + sensor->rot_term + 1;
if (hdr != VGXY61_NO_HDR)
return max(min_vblank, min_vblank_hdr);
return min_vblank;
}
#if KERNEL_VERSION(5, 14, 0) > LINUX_VERSION_CODE
static int vgxy61_enum_frame_size(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_frame_size_enum *fse)
#else
static int vgxy61_enum_frame_size(struct v4l2_subdev *sd,
struct v4l2_subdev_state *sd_state,
struct v4l2_subdev_frame_size_enum *fse)
#endif
{
struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
if (fse->index >= sensor->sensor_modes_nb)
return -EINVAL;
fse->min_width = sensor->sensor_modes[fse->index].width;
fse->max_width = fse->min_width;
fse->min_height = sensor->sensor_modes[fse->index].height;
fse->max_height = fse->min_height;
return 0;
}
static int vgxy61_update_analog_gain(struct vgxy61_dev *sensor, u32 target)
{
sensor->analog_gain = target;
if (sensor->streaming)
return vgxy61_write_reg(sensor, VGXY61_REG_ANALOG_GAIN, target,
NULL);
return 0;
}
static int vgxy61_apply_digital_gain(struct vgxy61_dev *sensor,
u32 digital_gain)
{
int ret = 0;
/*
* For a monochrome version, configuring DIGITAL_GAIN_LONG_CH0 and
* DIGITAL_GAIN_SHORT_CH0 is enough to configure the gain of all
* four sub pixels.
*/
vgxy61_write_reg(sensor, VGXY61_REG_DIGITAL_GAIN_LONG, digital_gain,
&ret);
vgxy61_write_reg(sensor, VGXY61_REG_DIGITAL_GAIN_SHORT, digital_gain,
&ret);
return ret;
}
static int vgxy61_update_digital_gain(struct vgxy61_dev *sensor, u32 target)
{
sensor->digital_gain = target;
if (sensor->streaming)
return vgxy61_apply_digital_gain(sensor, sensor->digital_gain);
return 0;
}
static int vgxy61_apply_patgen(struct vgxy61_dev *sensor, u32 index)
{
static const u8 index2val[] = {
0x0, 0x1, 0x2, 0x3, 0x10, 0x11, 0x12, 0x13
};
u32 pattern = index2val[index];
u32 reg = (pattern << VGXY61_PATGEN_LONG_TYPE_SHIFT) |
(pattern << VGXY61_PATGEN_SHORT_TYPE_SHIFT);
if (pattern)
reg |= VGXY61_PATGEN_LONG_ENABLE | VGXY61_PATGEN_SHORT_ENABLE;
return vgxy61_write_reg(sensor, VGXY61_REG_PATGEN_CTRL, reg, NULL);
}
static int vgxy61_update_patgen(struct vgxy61_dev *sensor, u32 pattern)
{
sensor->pattern = pattern;
if (sensor->streaming)
return vgxy61_apply_patgen(sensor, sensor->pattern);
return 0;
}
static int vgxy61_apply_gpiox_strobe_mode(struct vgxy61_dev *sensor,
enum vgxy61_strobe_mode mode,
unsigned int idx)
{
static const u8 index2val[] = {0x0, 0x1, 0x3};
int reg;
reg = vgxy61_read_reg(sensor, VGXY61_REG_SIGNALS_CTRL);
if (reg < 0)
return reg;
reg &= ~(0xf << (idx * VGXY61_SIGNALS_GPIO_ID_SHIFT));
reg |= index2val[mode] << (idx * VGXY61_SIGNALS_GPIO_ID_SHIFT);
return vgxy61_write_reg(sensor, VGXY61_REG_SIGNALS_CTRL, reg, NULL);
}
static int vgxy61_update_gpios_strobe_mode(struct vgxy61_dev *sensor,
enum vgxy61_hdr_mode hdr)
{
unsigned int i;
int ret;
switch (hdr) {
case VGXY61_HDR_LINEAR:
sensor->strobe_mode = VGXY61_STROBE_ENABLED;
break;
case VGXY61_HDR_SUB:
case VGXY61_NO_HDR:
sensor->strobe_mode = VGXY61_STROBE_LONG;
break;
default:
/* Should never happen */
WARN_ON(true);
break;
}
if (!sensor->streaming)
return 0;