fixed width/segfault issues

Author: atar13

run.sh

@@ -0,0 +1,6 @@
+#!/usr/bin/env bash
+
+aarch64-linux-gnu-as test_binary_translate_add.S 
+aarch64-linux-gnu-ld a.out -o a.bin
+./a.bin
+echo $?

src/instruction.rs

@@ -75,6 +75,13 @@ pub enum RiscVInstruction {
         dest: RiscVRegister,
         src: RiscVRegister,
     },
+    // Copy immediate
+    // `mv rd, rs1` expands to `addi rd, rs, 0`
+    #[strum(serialize = "mvi")]
+    Mvi {
+        dest: RiscVRegister,
+        imm: i32,
+    },
     /// Sign extend Word
     ///
     /// psuedo instruction which translates to `addiw rd, rs, 0`
@@ -175,7 +182,11 @@ pub enum ArmInstruction {
         src: ArmVal,
     },
     #[strum(serialize = "mov")]
-    Mov,
+    Mov {
+        width: ArmWidth,
+        dest: ArmRegister,
+        src: ArmVal
+    },
     #[strum(serialize = "ret")]
     Ret,
     /// Str [r2 + offset] = r1
@@ -435,7 +446,9 @@ impl Into<String> for ArmInstruction {
                     _ => todo!()
                 }
             },
-            ArmInstruction::Mov => todo!(),
+            ArmInstruction::Mov { width, dest, src } => {
+                format!("mov {}, {}", dest, src)
+            },
             ArmInstruction::Ret => todo!(),
             ArmInstruction::Str { width, src, dest } => {
                 match width {
@@ -468,7 +481,9 @@ impl Into<String> for ArmRegister {
             (ArmRegisterName::Pc, ArmWidth::SignedHalf) => todo!(),
             (ArmRegisterName::Pc, ArmWidth::Word) => todo!(),
             (ArmRegisterName::Pc, ArmWidth::Double) => todo!(),
-            (ArmRegisterName::Sp, _) => "sp",
+            (ArmRegisterName::Sp, ArmWidth::Word) => "wsp",
+            (ArmRegisterName::Sp, ArmWidth::Double) => "sp",
+            (ArmRegisterName::Sp, _) => todo!(),
             (ArmRegisterName::Lr, ArmWidth::Byte) => todo!(),
             (ArmRegisterName::Lr, ArmWidth::SignedByte) => todo!(),
             (ArmRegisterName::Lr, ArmWidth::Half) => todo!(),
@@ -479,8 +494,8 @@ impl Into<String> for ArmRegister {
             (ArmRegisterName::X0, ArmWidth::SignedByte) => todo!(),
             (ArmRegisterName::X0, ArmWidth::Half) => todo!(),
             (ArmRegisterName::X0, ArmWidth::SignedHalf) => todo!(),
-            (ArmRegisterName::X0, ArmWidth::Word) => todo!(),
-            (ArmRegisterName::X0, ArmWidth::Double) => todo!(),
+            (ArmRegisterName::X0, ArmWidth::Word) => "w0",
+            (ArmRegisterName::X0, ArmWidth::Double) => "x0",
             (ArmRegisterName::X1, ArmWidth::Byte) => todo!(),
             (ArmRegisterName::X1, ArmWidth::SignedByte) => todo!(),
             (ArmRegisterName::X1, ArmWidth::Half) => todo!(),
@@ -653,8 +668,8 @@ impl Into<String> for ArmRegister {
             (ArmRegisterName::X29, ArmWidth::SignedByte) => todo!(),
             (ArmRegisterName::X29, ArmWidth::Half) => todo!(),
             (ArmRegisterName::X29, ArmWidth::SignedHalf) => todo!(),
-            (ArmRegisterName::X29, ArmWidth::Word) => todo!(),
-            (ArmRegisterName::X29, ArmWidth::Double) => todo!(),
+            (ArmRegisterName::X29, ArmWidth::Word) => "w29",
+            (ArmRegisterName::X29, ArmWidth::Double) => "x29",
         };
         s.to_string()
     }
@@ -675,7 +690,11 @@ impl Display for ArmVal {
             ArmVal::Reg(arm_register) => arm_register.fmt(f),
             ArmVal::Imm(x) => write!(f, "{}", x),
             ArmVal::RegOffset(arm_register, offset) => {
-                write!(f, "[{}, {}]", arm_register, offset)
+                let double_reg = ArmRegister {
+                    name: arm_register.name,
+                    width: ArmWidth::Double
+                };
+                write!(f, "[{}, {}]", double_reg, offset)
             },
         }
     }

src/translate.rs

@@ -17,7 +17,11 @@ macro_rules! sorry {
 pub fn translate(riscv_instr: RiscVInstruction) -> ArmInstruction {
     match riscv_instr {
         RiscVInstruction::Addi { dest, src, imm } => {
-            let width = RiscVWidth::Word;
+            if let RiscVRegister::X0 = src {
+                return translate(RiscVInstruction::Mvi { dest, imm });
+            }
+
+            let width = RiscVWidth::Double;
             if imm >= 0 {
                 ArmInstruction::Add {
                     dest: map_register(dest, &width),
@@ -28,7 +32,7 @@ pub fn translate(riscv_instr: RiscVInstruction) -> ArmInstruction {
                 ArmInstruction::Sub {
                     dest: map_register(dest, &width),
                     arg1: map_register(src, &width),
-                    arg2: ArmVal::Imm(imm),
+                    arg2: ArmVal::Imm(imm.abs()),
                 }
             }
         }
@@ -50,6 +54,14 @@ pub fn translate(riscv_instr: RiscVInstruction) -> ArmInstruction {
                 arg2: ArmVal::Imm(0),
             }
         },
+        RiscVInstruction::Mvi { dest, imm } =>  {
+            let width = RiscVWidth::Double;
+            ArmInstruction::Mov {
+                width: map_width(&width),
+                dest: map_register(dest, &width),
+                src: ArmVal::Imm(imm)
+            }
+        },
         RiscVInstruction::Add {
             width,
             dest,
@@ -90,14 +102,20 @@ pub fn translate(riscv_instr: RiscVInstruction) -> ArmInstruction {
                 panic!("Li with imm out of range");
             }
 
-            ArmInstruction::Add {
-                dest: map_register(dest, &RiscVWidth::Double),
-                arg1: ArmRegister {
-                    width: ArmWidth::Double,
-                    name: ArmRegisterName::Zero,
-                },
-                arg2: ArmVal::Imm(imm),
+            let width = RiscVWidth::Double;
+            ArmInstruction::Mov { 
+                width: map_width(&width), 
+                dest: map_register(dest, &width), 
+                src: ArmVal::Imm(imm)
             }
+            // ArmInstruction::Add {
+            //     dest: map_register(dest, &RiscVWidth::Double),
+            //     arg1: ArmRegister {
+            //         width: ArmWidth::Double,
+            //         name: ArmRegisterName::Zero,
+            //     },
+            //     arg2: ArmVal::Imm(imm),
+            // }
         }
     }
 }
@@ -121,9 +139,9 @@ fn map_register_name(riscv_reg: RiscVRegister) -> ArmRegisterName {
         RiscVRegister::T0 => ArmRegisterName::X2,
         RiscVRegister::T1 => ArmRegisterName::X3,
         RiscVRegister::T2 => ArmRegisterName::X4,
-        RiscVRegister::S0FP => ArmRegisterName::X5,
+        // skipped X5
         RiscVRegister::S1 => ArmRegisterName::X6,
-        RiscVRegister::A0 => ArmRegisterName::X7,
+        RiscVRegister::A0 => ArmRegisterName::X0,
         RiscVRegister::A1 => ArmRegisterName::X8,
         RiscVRegister::A2 => ArmRegisterName::X9,
         RiscVRegister::A3 => ArmRegisterName::X10,
@@ -145,6 +163,7 @@ fn map_register_name(riscv_reg: RiscVRegister) -> ArmRegisterName {
         RiscVRegister::T4 => ArmRegisterName::X26,
         RiscVRegister::T5 => ArmRegisterName::X27,
         RiscVRegister::T6 => ArmRegisterName::X28,
+        RiscVRegister::S0FP => ArmRegisterName::X29,
     }
 }
 

src/utils.rs

@@ -2,10 +2,22 @@ use std::fs;
 
 use crate::{instruction::RiscVInstruction, translate::translate_instrs};
 
+const start: &str = r#"
+.text
+
+.global _start
+
+_start:
+bl main
+mov x8, #93
+svc #0
+
+main:
+"#;
 
 pub fn translate_to_file(instrs: Vec<RiscVInstruction>, path: String) {
     let arm_instrs = translate_instrs(instrs);
-    let mut contents = String::new();
+    let mut contents = String::from(start);
     for instr in arm_instrs {
         let x: String = instr.into();
         contents.push_str(&x);