Skip to content

[AMD] improve dsr1 fp4 disagg #1584

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
billishyahao merged 14 commits into from
May 31, 2026
Merged

[AMD] improve dsr1 fp4 disagg #1584

Changes from 1 commit
Commits
Show all changes
14 commits
Select commit Hold shift + click to select a range
d93b9c3
[AMD] improve dsr1 fp4 disagg
billishyahao May 29, 2026
1739443
add perf changelog
billishyahao May 29, 2026
1e5e851
Merge remote-tracking branch 'inf/main' into amd/mi355x-dsfp4-may29
billishyahao May 30, 2026
bfb242c
fix
billishyahao May 30, 2026
9a39f19
fix regression
billishyahao May 30, 2026
ae39e6b
sync config
billishyahao May 30, 2026
7a72e6d
fix
billishyahao May 31, 2026
7407a28
Merge branch 'main' into amd/mi355x-dsfp4-may29
billishyahao May 31, 2026
72ea8c3
fix
billishyahao May 31, 2026
12173fa
suppress aiter log
billishyahao May 31, 2026
af822ed
Merge branch 'main' into amd/mi355x-dsfp4-may29
billishyahao May 31, 2026
44c1376
fix
billishyahao May 31, 2026
a0a1ddc
fix
billishyahao May 31, 2026
cbc7168
fix
billishyahao May 31, 2026
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
27 changes: 23 additions & 4 deletions .github/configs/amd-master.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1862,7 +1862,7 @@
- "DECODE_MTP_SIZE=0"

dsr1-fp4-mi355x-sglang-disagg-mtp:
image: lmsysorg/sglang-rocm:v0.5.12-rocm720-mi35x-20260519
image: rocm/sgl-dev:v0.5.12.post1-rocm720-mi35x-20260526-sync
model: amd/DeepSeek-R1-0528-MXFP4-v2
model-prefix: dsr1
runner: mi355x-disagg
Expand Down Expand Up @@ -2030,7 +2030,7 @@
dp-attn: false
additional-settings:
- "DECODE_NODES=2"
- "DECODE_MTP_SIZE=2"
- "DECODE_MTP_SIZE=3"

# 1*DEP8 + 1*DEP8
- spec-decoding: "mtp"
Expand All @@ -2049,7 +2049,7 @@
dp-attn: true
additional-settings:
- "DECODE_NODES=1"
- "DECODE_MTP_SIZE=1"
- "DECODE_MTP_SIZE=3"

# 1*DEP8 + 1*DEP8
- spec-decoding: "mtp"
Expand All @@ -2068,7 +2068,26 @@
dp-attn: true
additional-settings:
- "DECODE_NODES=1"
- "DECODE_MTP_SIZE=1"
- "DECODE_MTP_SIZE=3"

# 1*DEP8 + 1*DEP8
- spec-decoding: "mtp"
conc-list: [ 64, 128 ]
prefill:
num-worker: 1
tp: 8
ep: 8
dp-attn: true
additional-settings:
- "PREFILL_NODES=1"
decode:
num-worker: 1
tp: 8
ep: 8
dp-attn: true
additional-settings:
- "DECODE_NODES=1"
- "DECODE_MTP_SIZE=3"

Check failure on line 2090 in .github/configs/amd-master.yaml

View check run for this annotation

Claude / Claude Code Review

Duplicate sweep points in new 1*DEP8+1*DEP8 ISL=8192 block 

This PR introduces duplicate benchmark sweep points: after bumping the two pre-existing `1*DEP8 + 1*DEP8` blocks in the ISL=8192 search-space from `DECODE_MTP_SIZE=1` to `DECODE_MTP_SIZE=3` (lines 2052, 2071), and then adding a new block with conc-list `[64, 128]` and the same MTP=3 (lines 2073-2090), all three blocks now share byte-identical topology. `conc=64` and `conc=128` will each be benchmarked twice on the expensive `mi355x-disagg` multinode runner. Fix by either dropping 64 and 128 from
Comment thread
Oseltamivir marked this conversation as resolved.

# 2*DEP8 + 1*DEP8
- spec-decoding: "mtp"
Expand Down