Update DSv4 B200 TRT image to 2dd03e6 (non-MTP + MTP)#1664
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| - config-keys: | ||
| - dsv4-fp4-b200-trt | ||
| - dsv4-fp4-b200-trt-mtp | ||
| description: | ||
| - "Use official TRT-LLM release image (nvcr.io/nvidia/tensorrt-llm/release:1.3.0rc15.post1) for B200 DeepSeek-V4-Pro TRT configs, replacing the custom ghcr.io feat/deepseek_v4 build (9aa3715)." | ||
| pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/PENDING |
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🟡 The new perf-changelog entry at line 3467 still has the pull/PENDING placeholder instead of pull/1664 — this will merge as a broken changelog link, breaking the convention used by every other entry in the file. Additionally, the description bullet only documents the image switch and omits the substantial attention-DP concurrency search-space reduction also in this PR (trt 1k1k 2048→128, trt 8k1k 1024→256, trt-mtp 1k1k 512→128); the file consistently documents such changes alongside image bumps (see lines 56, 81, 447, 2236). Both fixes are trivial — replace PENDING with 1664 and add a second bullet noting the concurrency tightening.
Extended reasoning...
Issue 1 — pr-link: .../pull/PENDING
The diff adds at perf-changelog.yaml:3467:
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/PENDINGThis is PR #1664, but the URL was left as the literal placeholder PENDING. As written, the link resolves to https://github.com/SemiAnalysisAI/InferenceX/pull/PENDING, which is a 404.
Step-by-step proof. The three entries immediately preceding this one (added in PRs #1641, #1647, #1648) all use concrete integer PR numbers in their pr-link field — e.g. lines 3439, 3446, 3453, 3460. Grepping perf-changelog.yaml for pull/PENDING matches only this new entry; every other one of the ~hundred entries uses a real PR number. So this is unambiguously a forgotten placeholder, not a stylistic choice.
Issue 2 — concurrency search-space changes omitted from description
The PR makes two substantive behavioral changes:
- Image switch (documented in the new bullet).
- Attention-DP concurrency upper-bound tightening, not documented:
dsv4-fp4-b200-trt1k1k:conc-end: 2048 → 128dsv4-fp4-b200-trt8k1k:conc-end: 1024 → 256dsv4-fp4-b200-trt-mtp1k1k:conc-end: 512 → 128
Future readers of perf-changelog.yaml will not see that the sweep grid shrank and that previously-benchmarked high concurrencies (256–2048) are no longer covered.
Why this is a real gap, not subjective. The refutation argues that what to put in a changelog is an editorial call and the PR-description framing treats concurrency as a supporting change. That is a fair concern, but the established convention in this specific file repeatedly documents concurrency search-space changes alongside image bumps, e.g.:
- L56: "Extend concurrency to 128 for gptoss mi355x/b200"
- L81: "Increase concurrency for some configurations" — paired with a TRT image bump on L80 for
dsr1-fp8-h200-trt, an exact parallel to this PR - L447: "Extend maximum concurrency to 256 across all sequence lengths"
- L2236: "Raise conc-end from 64 to 256..."
The PR description itself ("Tighten concurrency search space to fit B200 memory ceiling") and the Cursor-Bugbot summary both call this out as a distinct change. Omitting it from perf-changelog.yaml is a genuine divergence from how the file is maintained — not just style.
Impact and fix
Neither issue affects runtime/benchmark behavior; both are changelog-metadata cleanups, hence nit severity. Suggested fix:
- config-keys:
- dsv4-fp4-b200-trt
- dsv4-fp4-b200-trt-mtp
description:
- "Use official TRT-LLM release image (nvcr.io/nvidia/tensorrt-llm/release:1.3.0rc15.post1) for B200 DeepSeek-V4-Pro TRT configs, replacing the custom ghcr.io feat/deepseek_v4 build (9aa3715)."
- "Tighten attention-DP concurrency search space to fit B200 memory: 1k1k conc-end 2048→128 (trt) / 512→128 (trt-mtp); 8k1k conc-end 1024→256 (trt)."
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/1664|
see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=26969952142 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=26987679137 |
The 2dd03e6 build sizes the slot pool as max_num_requests = max_batch_size * num_micro_batches, with num_micro_batches=2 under the overlap scheduler -> 512 at --max_batch_size 256 (tensorrt_llm/_torch/pyexecutor/_util.py on feat/deepseek_v4). The older 9aa3715 build used 256. That extra headroom pushed the conc-256 dpa=true 8k1k prefill-warmup ~0.3 GiB over B200's 178 GiB and OOM'd (run 26987679137, job 79643136619). Setting disable_overlap_scheduler: true makes num_micro_batches=1 -> max_num_requests=256, matching the 9aa3715 footprint that fit conc-256 on B200. Trade-off: turns off the overlap scheduler (throughput optimization), so these B200 numbers are not directly comparable to overlap-on configs. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=27000571018 |
Summary
dsv4-fp4-b200-trtanddsv4-fp4-b200-trt-mtpatghcr.io/semianalysisai/trtllm-deepseek-v4:feat-deepseek_v4-2dd03e6, replacing the older9aa3715build.Test plan
Note
Low Risk
Benchmark-only image tag and sweep bound changes in master config and changelog; no application runtime or auth paths.
Overview
Updates B200 DeepSeek-V4-Pro TensorRT-LLM benchmark configs (
dsv4-fp4-b200-trtanddsv4-fp4-b200-trt-mtp) to use container imagefeat-deepseek_v4-2dd03e6instead of9aa3715.Concurrency sweeps for attention-DP (
ep: 8,dp-attn: true) are capped lower so jobs stay within B200 memory: 1k/1k EP runs now stop at 128 (was up to 2048/512 for MTP), and 8k/1k at 256 (was up to 1024). Pure-TP ranges are unchanged.Documents the change in
perf-changelog.yamlfor both config keys.Reviewed by Cursor Bugbot for commit 7baa914. Bugbot is set up for automated code reviews on this repo. Configure here.