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add rpo to LIR cfg
1 parent 3290d88 commit 16a4144

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Lines changed: 41 additions & 1 deletion

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zjit/src/backend/lir.rs

Lines changed: 41 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
use std::collections::HashMap;
1+
use std::collections::{HashMap, HashSet};
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use std::fmt;
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use std::mem::take;
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use std::panic;
@@ -2233,6 +2233,46 @@ impl Assembler
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}
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}
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}
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/// Return a traversal of the block graph in reverse post-order.
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pub fn rpo(&self) -> Vec<BlockId> {
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let entry_blocks: Vec<BlockId> = self.basic_blocks.iter()
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.filter(|block| block.entry)
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.map(|block| block.id)
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.collect();
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let mut result = self.po_from(entry_blocks);
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result.reverse();
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result
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}
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/// Compute postorder traversal starting from the given blocks.
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/// Outbound edges are extracted from the last 0, 1, or 2 instructions (jumps).
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fn po_from(&self, starts: Vec<BlockId>) -> Vec<BlockId> {
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#[derive(PartialEq)]
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enum Action {
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VisitEdges,
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VisitSelf,
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}
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let mut result = vec![];
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let mut seen = HashSet::with_capacity(self.basic_blocks.len());
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let mut stack: Vec<_> = starts.iter().map(|&start| (start, Action::VisitEdges)).collect();
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while let Some((block, action)) = stack.pop() {
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if action == Action::VisitSelf {
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result.push(block);
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continue;
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}
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if !seen.insert(block) { continue; }
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stack.push((block, Action::VisitSelf));
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let EdgePair(edge1, edge2) = self.basic_blocks[block.0].edges();
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if let Some(edge) = edge1 {
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stack.push((edge.target, Action::VisitEdges));
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}
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if let Some(edge) = edge2 {
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stack.push((edge.target, Action::VisitEdges));
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}
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}
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result
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}
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}
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/// Return a result of fmt::Display for Assembler without escape sequence

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