New SerialUPDI Hardware Idea: Active Open-Drain with 74HC125 (Tested up to 921kbps)

[old-school-nanbei]

Hi Spence and community,
I’ve developed a very simple and robust SerialUPDI circuit using a 74HC125 buffer and a CP2102 adapter. It provides a much cleaner signal than the standard resistor/diode method.
The Circuit Logic:
Buffer Input: Tied to GND.
Control (/OE): Connected to TX.
Output: Connected to the UPDI/RX node with a 4.7k pull-up to VCC.
Results:
I successfully achieved stable uploads at 921,600 baud on the ATtiny1616.
The circuit acts as an active open-drain driver, providing sharp signal edges.

Keep in mind that 921kbps is the hardware limit and may cause errors. I recommend staying at more moderate speeds

Pro Tip: For even better signal integrity on the return path, a second buffer from the 74HC125 can be used to buffer the RX line (Input to UPDI node, /OE to GND, Output to CP2102 RX).
I hope this helps improve the SerialUPDI hardware options for the core!

[jvasileff]

I designed some similar UPDI adapters, and a word of caution: you might run into problems unless you use logic chips with Schmitt trigger inputs, especially if you buffer RX. The 74HCS logic line is worth looking into. In my case, a prototype worked great, but on a scope, the edges were a mess, and the initial PCB mostly didn't work.

[old-school-nanbei]

Thanks for your input! I understand your concern regarding Schmitt triggers, and the 74HCS series is indeed a great suggestion for harsh environments.

However, in this specific arrangement, the results are quite different from what you described. I’ve been monitoring the signal with a Rigol DHO804, and the waveform is exceptionally clean. The capture I’m sharing was taken at 3V while uploading at 460,800 baud.

It is important to clarify that I am buffering the RX path through a second gate of the 74HC125. This effectively 'cleans' and regenerates the signal before it reaches the CP2102, which explains the sharp edges you see on the scope. I've found that this active approach eliminates the 'mess' often seen in passive resistor/diode bridges.

While some USB/Serial adapters can be problematic at these speeds, the 74HC/LS125 logic has proven to be very solid in my tests. It’s all about keeping the bus capacitance low and the drive strength high!

[jvasileff]

This effectively 'cleans' and regenerates the signal before it reaches the CP2102

My concern was that the transitions from the MCU (especially if using long leads) may not be fast enough to meet the input transition time requirements of the buffer. The CP2102 is capable of dealing with slow input transitions, but a non-Schmitt trigger buffer may not be, causing its output to oscillate which would be a problem for the CP2102.

That being said, it looks like the input transition time requirement for the 74HC125 is 500ns, so maybe that's fine. I was probably using a faster logic chip.

You'd need to zoom in much closer to see the oscillations on the scope, but it's probably fine anyway, unlike my initial prototype.