You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Copy file name to clipboardExpand all lines: roadmap/ltspice-netlist-compatibility-plan.md
+93-13Lines changed: 93 additions & 13 deletions
Display the source diff
Display the rich diff
Original file line number
Diff line number
Diff line change
@@ -30,6 +30,12 @@ The roadmap is intentionally parser-first:
30
30
- Validation currently has error and warning levels only. The roadmap should use warnings for recognized LTspice no-ops until an informational level exists.
31
31
-`ValidationEntryCollection.Warnings` appears to filter `ValidationEntryLevel.Error` instead of `ValidationEntryLevel.Warning`; fix this before adding warning-based no-op behavior.
32
32
-`MathFunctions.CreateTable()` still returns `null`, making scalar `table(...)` an early expression-compatibility candidate.
33
+
- The default object mappings already register common controls such as `.param`, `.func`, `.global`, `.options`, `.temp`, `.step`, `.mc`, `.tran`, `.ac`, `.dc`, `.op`, `.noise`, `.save`, `.plot`, `.print`, `.meas`, `.measure`, `.ic`, `.nodeset`, and `.wave`, but this does not mean LTspice syntax parity is proven for every variant.
34
+
- No registered controls currently cover LTspice `.backanno`, `.tf`, `.four`, `.net`, `.ferret`, `.loadbias`, `.savebias`, or `.machine` / `.endmachine` blocks.
35
+
-`.TRAN` currently accepts traditional numeric forms and trailing `UIC`; LTspice one-argument form and modifiers such as `startup`, `steady`, `nodiscard`, and `step` still need explicit compatibility decisions.
36
+
- Source waveform mappings cover `SIN` / `SINE`, `PULSE`, `PWL`, `AM`, `SFFM`, and wave-file input, but gaps remain for `EXP(...)`, LTspice cycle-count arguments, optional wave channel defaults, and several independent-source instance options.
37
+
- MOS model generation currently covers legacy levels 1, 2, and 3. LTspice `VDMOS` and advanced monolithic levels such as BSIM/EKV/HiSIM variants are runtime or intentional-unsupported candidates.
38
+
- Distributed-line support currently starts from lossless `T`. LTspice lossy `O` / `LTRA` and uniform RC-line `URC` models need engine triage before runnable support is claimed.
The supported `LAPLACE` transfer subset remains a finite, proper rational polynomial in `s` with finite coefficients and non-singular DC gain.
81
87
88
+
## LTspice Feature Inventory
89
+
90
+
This inventory is a planning aid. It intentionally separates parser acceptance, SpiceSharp object generation, runtime execution, and numeric confidence. Items in the first table are not new claims unless a fixture or test already proves the LTspice spelling.
91
+
92
+
### Existing Baseline That Needs Matrix Coverage
93
+
94
+
| Area | LTspice patterns to cover | Current posture | Roadmap action |
95
+
| --- | --- | --- | --- |
96
+
| Behavioral sources |`B... V=`, `B... I=`, `VALUE={...}` on `E` / `G` / `F` / `H`| Baseline support exists | Preserve behavior and add LTspice-specific fixtures |
97
+
| Laplace sources | Source-level `LAPLACE`, function-style `LAPLACE(input, transfer)`, `M=`, `TD=`, `DELAY=`| Baseline support exists | Keep on source/lowering path, not a scalar function |
98
+
| Legacy ABM forms |`TABLE`, `POLY`, controlled-source value expressions | Parser lowering exists for source forms | Add fixtures that prove read/run behavior and writer parity |
99
+
| Parameters and functions |`.param`, `.func`, subcircuit defaults | Generic support exists | Add LTspice scoping and expression fixtures |
| Initial conditions |`.ic`, `.nodeset`, `.temp`, `.options temp`, `.options tnom`| Generic support exists | Verify LTspice generated-netlist forms |
103
+
| Includes and libraries |`.include`, `.lib`, nested files and library sections | Preprocessors exist | Tighten path, section, quoting, and Windows separator fixtures |
104
+
105
+
### Incomplete High-Yield Parser And Reader Work
106
+
107
+
| Area | LTspice feature | Expected compatibility class | Notes |
108
+
| --- | --- | --- | --- |
109
+
| Generated metadata |`.backanno`| Recognized no-op | Automatically emitted by LTspice generated netlists; warning-only in LTspice mode. |
| Transient analysis |`.tran <Tstop>`, `UIC`, `startup`, `steady`, `nodiscard`, `step`, max-step handling | Parser shim / diagnostic | Current reader handles traditional numeric forms plus trailing `UIC` only. |
112
+
| Measurements |`FIND`, `WHEN`, `AT`, `DERIV`, `PARAM`, `TRIG` / `TARG`, `AVG`, `MAX`, `MIN`, `PP`, `RMS`, `INTEG`, stepped output, AC complex comparisons | Supported / diagnostic by case | Existing measurement code needs a syntax-by-syntax fixture audit. |
113
+
| Save/output selection |`.save V(*)`, `Id(*)`, terminal-current forms such as `Ic(Q1)`, `dialogbox`| Parser shim / no-op / diagnostic | Wildcards and GUI selection should not be treated like guaranteed exports until tested. |
114
+
| Wave output |`.wave <file> <bits> <sampleRate> V(...) ...`| Parser shim / incomplete | Existing implementation appears limited to one or two channels; LTspice allows many channels. |
115
+
| Source waveforms |`EXP(...)`, `PULSE(... Ncycles)`, `SINE(... Phi Ncycles)`, PWL file variants | Parser shim / engine if needed | Add or diagnose before claiming LTspice source-waveform parity. |
116
+
| Source instance options | Voltage-source `Rser`, `Cpar`; current-source `load`, `R=<value>`, `tbl=(...)`; `wavefile=<path> [chan=<n>]`| Parser shim / diagnostic | Some can lower to existing components; behavior-changing cases need explicit handling. |
117
+
| Scalar expressions |`table(...)`, `pwr`, `pwrs`, `hypot`, `sgn`, `round`, `fabs`, `arccos`, `arcsin`, `arctan`| Parser/runtime shim | Static functions are high-value because vendor decks use them in `.param` and ABM expressions. |
118
+
| Random functions |`flat`, `mc`, `rand`, `random`, `gauss`, `white`| Supported with divergence notes / diagnostic | Existing random behavior must be compared with LTspice semantics before numeric claims. |
119
+
| Operators |`**`, Boolean AND, OR, XOR, unary `!`, unary `~`| Parser shim / diagnostic | LTspice uses `^` as Boolean XOR in ordinary expressions and exponentiation only in Laplace expressions. |
120
+
| Smooth limits |`uplim`, `dnlim`, `limit` semantics | Parser/runtime shim |`limit` exists, but LTspice smooth limit functions need separate tests. |
121
+
| Behavioral-source options |`ic=`, `tripdv`, `tripdt`, `Rpar`, `laplace=<expr>`, `window`, `nfft`, `mtol`, `NoJacob`| Parser shim / diagnostic | Timestep-control and FFT-convolution options must not be silently ignored. |
122
+
123
+
### Unsupported Or Engine-Required Features To Classify Explicitly
124
+
125
+
| Feature | Reason to classify | Initial action |
126
+
| --- | --- | --- |
127
+
|`.tf`| SpiceSharp runtime may support related small-signal operations, but no LTspice control reader is registered | Add targeted diagnostic before implementation |
128
+
|`.four`| Post-transient Fourier reporting, not a circuit element | Add targeted diagnostic or post-processing proposal |
129
+
|`.net`| Network-parameter post-processing around `.ac`| Add targeted diagnostic; consider later AC export/post-processing support |
|`.loadbias` / `.savebias`| Reads/writes solver state files | Diagnostic until a portable state format is designed |
132
+
|`.machine` / `.endmachine`| LTspice state-machine language with state, rule, and output statements | Engine required or intentional unsupported |
133
+
| Dynamic ABM functions |`delay`, `absdelay`, `ddt`, `idt`, `sdt`, `idtmod` need transient history or integration state | Diagnostic until SpiceSharpBehavioral/runtime support is proven |
134
+
|`VDMOS`| LTspice-specific power MOSFET behavior and capacitance model | SpiceSharp engine proposal, not parser-only support |
135
+
| Advanced MOS levels | Levels 4, 5, 6, 8, 9, 12, 14, 73 and related variants | Engine-required classification per model family |
136
+
| Lossy/distributed lines |`O` / `LTRA`, `URC`| Engine-required classification and direct SpiceSharp tests |
137
+
| MESFET and IGBT families |`NMF`, `PMF`, `NIGBT`, `PIGBT`| Diagnostic or engine proposal |
138
+
139
+
### Model And Instance Parameter Triage
140
+
141
+
Build model-family tables that classify each parameter as direct map, alias, metadata no-op, behavior-changing unsupported, or engine-required.
| Diode | Ideal diode parameters `Ron`, `Roff`, `Vfwd`, `Vrev`, `Rrev`, `Ilimit`, `Revilimit`, `Epsilon`, `Revepsilon`; metadata such as `Vpk`, `Ipk`, `Iave`, `Irms`, `diss`; extended recovery/noise terms | Metadata can warn/no-op in LTspice mode; electrical terms need mapping or diagnostic |
146
+
| Switch |`Lser`, `Vser`, `Ilimit`, `level`, `oneway`, `epsilon`, negative hysteresis semantics | Map only proven equivalents; diagnose current limiting and one-way behavior until represented |
147
+
| MOSFET | Three-terminal `VDMOS` instances, `off`, `IC=`, `temp`, geometry defaults, metadata `mfg`, `Vds`, `Ron`, `Qg`, `pchan` / `nchan`| Legacy MOS parameters can map where supported; `VDMOS` is engine-required |
148
+
| R/C/L | Temperature coefficients, geometry forms, model-level defaults, layout metadata | Mostly parser tolerance, but behavior-changing temperature forms need tests |
149
+
| Transmission line | Lossless `T` options versus `O` / `LTRA` and `URC` model cards | Preserve `T`; classify lossy/distributed lines as engine-required |
150
+
82
151
## Compatibility Matrix
83
152
84
153
Create a matrix document or test data file before broadening support claims. Classify each feature independently for parse, read, run, and numeric confidence.
@@ -116,11 +185,13 @@ Goal: replace guesswork with executable, redistributable LTspice compatibility e
116
185
Implementation backlog:
117
186
118
187
- Add synthetic fixtures under the integration-test area and classify them as parse-only, read-only, runnable, or expected diagnostic.
188
+
- Seed the first matrix from the LTspice feature inventory in this document, rather than from support claims in README text.
119
189
- Cover `.include` and `.lib` with quoted paths, nested includes, selected sections, Windows separators, and relative paths.
120
190
- Cover common generated controls: `.param`, `.func`, `.step`, `.meas`, `.options`, `.ic`, `.nodeset`, `.temp`, and fixture-proven no-op candidates such as `.backanno`.
- Cover model decks and subcircuits with synthetic, license-safe examples.
191
+
- Cover unsupported-control diagnostics for `.tf`, `.four`, `.net`, `.ferret`, `.loadbias`, `.savebias`, and `.machine` before attempting full implementations.
- Cover model decks and subcircuits with synthetic, license-safe examples that mimic vendor decks without copying proprietary libraries.
124
195
125
196
Acceptance criteria:
126
197
@@ -138,7 +209,9 @@ Implementation backlog:
138
209
- Add `CompatibilityOptions` to parser and reader settings, with an LTspice preset or factory.
139
210
- Wire opt-in LTspice behavior through preprocessing, control mapping, and reader diagnostics without changing default behavior.
140
211
- Add a recognized-no-op control path for fixture-proven display/probing/annotation statements, starting with `.backanno`.
141
-
- Add targeted unsupported diagnostics for LTspice controls that are recognized but not safe to ignore.
212
+
- Add option classification tables for mapped solver options, warning no-ops, and behavior-changing unsupported LTspice options.
213
+
- Add targeted unsupported diagnostics for LTspice controls that are recognized but not safe to ignore, starting with `.tf`, `.four`, `.net`, `.ferret`, `.loadbias`, `.savebias`, and `.machine`.
214
+
- Decide how `.tran` one-argument syntax and LTspice modifiers are handled before broad transient compatibility claims.
142
215
- Tighten `.include` / `.lib` tests before changing path or section behavior.
143
216
144
217
Acceptance criteria:
@@ -154,9 +227,12 @@ Goal: accept more LTspice behavioral expressions when they can map to existing r
154
227
Implementation backlog:
155
228
156
229
- Audit LTspice scalar functions against existing math functions, random functions, resolver functions, `.FUNC`, and behavioral-source support.
157
-
- Implement safe scalar aliases where semantics are clear and static.
230
+
- Implement safe scalar aliases where semantics are clear and static, including `arccos`, `arcsin`, `arctan`, `fabs`, `sgn`, and `round`.
231
+
- Add or diagnose LTspice operators such as `**`, Boolean `&`, `|`, `^`, and unary `!` / `~`.
232
+
- Add static functions such as `pwr`, `pwrs`, and `hypot` when their real-valued semantics can be represented.
158
233
- Implement or lower scalar `table(...)`; the current `CreateTable()` TODO makes this an early candidate.
159
-
- Compare existing `mc`, `gauss`, `flat`, `random`, and `unif` behavior with LTspice semantics and document divergences.
234
+
- Compare existing `mc`, `gauss`, `flat`, `random`, `rand`, `white`, and `unif` behavior with LTspice semantics and document divergences.
235
+
- Add compatibility decisions for smooth limiting functions such as `uplim` and `dnlim`.
160
236
- Add targeted diagnostics for dynamic/stateful functions that need simulation history, derivatives, integrals, delay buffers, or transient noise semantics.
161
237
- Keep `LAPLACE(...)` on the existing lowering path and do not register it as a scalar math function.
162
238
@@ -177,17 +253,18 @@ Implementation backlog:
177
253
- Warn on LTspice metadata or layout-only parameters only in LTspice compatibility mode.
178
254
- Error on unsupported behavior-changing parameters with component/model name and suggested fallback when possible.
179
255
- Test model parameter expressions, subcircuit defaults, geometry parameters, temperature parameters, and `.MODEL` variants.
256
+
- Add explicit triage for LTspice ideal diode parameters, switch current-limiting and one-way parameters, MOS metadata, and three-terminal `VDMOS` syntax.
180
257
181
258
Model-family priorities:
182
259
183
260
| Family | Parser action | Engine action |
184
261
| --- | --- | --- |
185
262
| R/C/L | Alias tolerances, temperature coefficients, and geometry forms | Usually existing behavior |
186
-
| Diode | Map supported parameters, diagnose unsupported recovery/noise terms | Engine changes only for measured blockers |
| Transmission line | Preserve current lossless `T` support |Lossy/distributed variants may need engine work |
265
+
| MOSFET | Separate legacy levels from LTspice/vendor power models, especially `VDMOS`| Advanced models likely engine-required |
266
+
| Switch | Map threshold, hysteresis, and resistance aliases; diagnose `Lser`, `Vser`, `Ilimit`, `oneway`, and `epsilon` until represented | Engine work may be needed for current limiting and one-way behavior|
267
+
| Transmission line | Preserve current lossless `T` support |`O` / `LTRA` and `URC` need engine work |
191
268
192
269
Acceptance criteria:
193
270
@@ -201,9 +278,12 @@ Goal: add engine capabilities only after parser fixtures prove that parsing and
201
278
202
279
Possible engine work:
203
280
204
-
- LTspice/vendor-specific MOSFET or power-device models.
205
-
- Lossy or distributed transmission-line variants.
206
-
- Dynamic behavioral functions requiring time history, derivatives, integrals, or delay buffers.
281
+
- LTspice/vendor-specific MOSFET or power-device models, especially `VDMOS`.
282
+
- Advanced monolithic MOS levels beyond existing levels 1, 2, and 3.
283
+
- Lossy or distributed transmission-line variants such as `O` / `LTRA` and `URC`.
284
+
- Dynamic behavioral functions requiring time history, derivatives, integrals, delay buffers, or transient noise.
285
+
- State-machine support for `.machine` blocks if it is ever considered in scope.
286
+
- MESFET and IGBT device families if fixtures prove they are common blockers.
207
287
- Transient robustness around timestep-sensitive switching.
208
288
- Noise behavior differences where LTspice semantics do not match SpiceSharp frequency-domain noise support.
0 commit comments