Merge pull request #281 from MahirAbbas/master

include note about driving n0.valid

Author: Dolu1990

source/SpinalHDL/Libraries/Pipeline/introduction.rst

@@ -1025,4 +1025,20 @@ Here is a simple testbench which implement a loop which will make the led counti
   }
 
 
+Note 
+======
+When building a pipeline, only ``node(0).valid`` or ``node(n).ready`` (where ``n`` is the last stage in the pipeline) may be driven by user logic. It is possible for the builder to optimise away ``node.ready`` or ``node.valid`` signals if they are not used. To guarantee ``node.ready`` or ``node.valid`` signal creation (important if you use ``CtrlLink()`` or any other link where you want flow control) ``node(0).valid`` must be driven manually. 
 
+.. code-block:: scala
+
+   n0.valid := io.up.valid 
+   // or
+   n0.valid := True/False
+  
+   //Example with CtrlLink()
+   case class inputStage(stage: CtrlLink) extends Area {
+      stage.up.valid := True
+   }
+
+
+This is sufficient to ensure halting and ``CtrlLink`` behaviour works as intended (``node.valid`` or ``node.ready`` signals are not optimised away).

source/SpinalHDL/Libraries/logic.rst

@@ -0,0 +1,47 @@
+Logic Simplification Utilities and Decoder 
+===============================
+A minimal Boolean simplification and decode-table utility for decoders using quine-mcklusky. 
+Provides masked pattern matching, Quine McCluskey style logic reduction, and a high-level decode-table builder. 
+--- # Masked 
+Represents a bit pattern with care (significant) and don't-care bits. 
+`value` = bit values 
+`care` = which bits must match (1 = match, 0 = don't care) 
+--- Example:
+
+.. code-block:: scala 
+  Masked(0010), 
+  Masked(11-1), 
+  Masked(1--0) 
+
+e.g RISC-V instrs
+
+.. code-block:: scala 
+  val ADD     = M"0000000----------000-----0110011"
+  val ADDI    = M"-----------------000-----0010011"
+  
+Used to define instruction encodings for decode tables. 
+
+
+--- # DecodingSpec 
+High-level builder for decode tables using `Masked` patterns. 
+`` val decoder = new DecodingSpec()
+  **API:** 
+
+  * `addNeeds(key : Masked, value : Masked)` 
+  * `addNeeds(keys : Seq[Masked], value : Masked)` 
+  * `build(sel, coverAll)`
+  * ``def setDefault(value : Masked)``
+
+  generate simplified decode logic 
+**Example:** 
+.. code-block:: scala ``` 
+  val spec = new DecodingSpec(UInt(4 bits)) 
+  spec.setDefault(Masked(U"0011")) 
+  spec.addNeeds(Masked(B"000"), Masked(U"1000")) 
+  result := spec.build(sel, allPatterns) 
+
+Generates minimized combinational decode logic. 
+  --- # Practical Use 
+Define bit patterns as `Masked` and feed them into `DecodingSpec` to build compact decode logic (e.g., RISC-V). 
+
+* Output hardware is minimized (fewer LUTs / simpler gates)