Add doc about SVIF (system verilog interface)

[yportne13]

for this pr: SpinalHDL/SpinalHDL#1364

[andreasWallner]

FYI: while WIP please open as a draft - then it doesn't show up in the inboxes of the maintainers to review.

[Dolu1990]

Hi,

One thing which is important i think, is to specify in the doc that this feature may be subject to changes (experimental)
That will let us more wiggle room for future updates :)

[mrcmry]

Hi !

I have seen that the PR to the spinal lib has been merged in dev and is in v1.14.1.

I did some typo suggestions, you can use the github web interface to add them to a batch and merge them in a commit in the web interface (see this doc).

And then if it's ok for you we can merge this PR.

[mrcmry]

Suggested change

	If you have used a certain interface in multiple places, and at one of those locations ``sigA``, you wish to flatten it instead of generating an interface, you can achieve this by calling ``sigA.notSVIF()`` to fully flatten the signal. If the signal has nested interfaces and you only want to expand the outermost layer, you can use ``sigA.notSVIFthisLevel()``.
	If you have used a certain interface in multiple places, and at one of those locations ``mySignal``, you wish to flatten it instead of generating an interface, you can achieve this by calling ``mySignal.notSVIF()`` to fully flatten the signal. If the signal has nested interfaces and you only want to expand the outermost layer, you can use ``mySignal.notSVIFthisLevel()``.

[mrcmry]

@yportne13 did you have some time to look at my review ? If you are ok with my suggestion I can include them and merge directly with the github inteface ?

Is it ok for you ?

[mrcmry]

I squashed the review commit together in #247, so it it merged and we can close this.

Thanks @yportne13 for the doc !