diff --git a/source/SpinalHDL/Other language features/vhdl_generation.rst b/source/SpinalHDL/Other language features/vhdl_generation.rst
index bfb448a8a4..1680f1e4dd 100644
--- a/source/SpinalHDL/Other language features/vhdl_generation.rst	
+++ b/source/SpinalHDL/Other language features/vhdl_generation.rst	
@@ -192,8 +192,6 @@ The syntax for command line arguments is:
            Select the VHDL mode
      --verilog
            Select the Verilog mode
-     -d | --debug
-           Enter in debug mode directly
      -o <value> | --targetDirectory <value>
            Set the target directory