In this issue, I propose a new feature which has been requested by my coworkers and would simplify their RTL-testing routines. I am planning on adding this feature myself. Here, I aim to discuss the feature with the project's authors and get the necessary approval.
Motivation
My coworkers want to collect coverage information in our RAL-based UVM tests. The easiest way of doing this seems to involve replacing the base class of generated registers (uvm_reg) with a custom class myreg and implementing the coverage-related logic there:
Proposal
I propose adding a special CLI option: --reg-base-class with default value of uvm_reg. This option regulates which base class is used for generated register classes:
class {{get_class_name(node)}} extends {{reg_base_class}};
If --reg-base-class=myreg is passed then all generated registers inherit from myreg
Motivation
My coworkers want to collect coverage information in our RAL-based UVM tests. The easiest way of doing this seems to involve replacing the base class of generated registers (
uvm_reg) with a custom classmyregand implementing the coverage-related logic there:Proposal
I propose adding a special CLI option:
--reg-base-classwith default value ofuvm_reg. This option regulates which base class is used for generated register classes:If
--reg-base-class=myregis passed then all generated registers inherit frommyreg