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firmware/coreboot: Subtree merged chrome-ec
Signed-off-by: David Hendricks <dhendricks@fb.com>
2 parents 262ea45 + 33581f7 commit d4467c3

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‎firmware/coreboot/3rdparty/chromeec‎

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‎firmware/coreboot/3rdparty/chromeec/.checkpatch.conf‎

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# Not Linux, so don't expect a Linux tree.
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--no-tree
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# Ignore aspects we don't follow here.
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--ignore SPLIT_STRING
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--ignore GIT_COMMIT_ID

‎firmware/coreboot/3rdparty/chromeec/.clang-format‎

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BasedOnStyle: LLVM
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Language: Cpp
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IndentWidth: 8
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UseTab: Always
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BreakBeforeBraces: Linux
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AllowShortIfStatementsOnASingleLine: false
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IndentCaseLabels: false
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SortIncludes: false
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ContinuationIndentWidth: 8
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ColumnLimit: 80

‎firmware/coreboot/3rdparty/chromeec/.gitignore‎

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build/
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private*/
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*.swp
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*.pyc
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tags
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TAGS
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cscope.*
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.tests-passed
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.failedboards/
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.sizes.txt

‎firmware/coreboot/3rdparty/chromeec/COMMIT-QUEUE.ini‎

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# Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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# Per-project Commit Queue settings.
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# Documentation: http://goo.gl/4rZhAx
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[GENERAL]
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# Board-specific no-vmtest-pre-cq, include boards that actually build
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# chromeos-ec. We use the no-vmtest-pre-cq configs since the tests won't
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# actually test against our EC changes. (That's what FAFT is for)
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pre-cq-configs: gru-no-vmtest-pre-cq reef-no-vmtest-pre-cq chell-no-vmtest-pre-cq
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celes-no-vmtest-pre-cq fizz-no-vmtest-pre-cq
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# Stages to ignore in the commit queue. If these steps break, your CL will be
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# submitted anyway. Use with caution.
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ignored-stages: HWTest ImageTest VMTest

‎firmware/coreboot/3rdparty/chromeec/LICENSE‎

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// Copyright (c) 2010 The Chromium OS Authors. All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following disclaimer
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// in the documentation and/or other materials provided with the
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// distribution.
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// * Neither the name of Google Inc. nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

‎firmware/coreboot/3rdparty/chromeec/Makefile‎

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# Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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#
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# Embedded Controller firmware build system
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#
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BOARD ?= bds
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# Directory where the board is configured (includes /$(BOARD) at the end)
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BDIR:=$(wildcard board/$(BOARD) private-*/board/$(BOARD))
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# There can be only one <insert exploding windows here>
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ifeq (,$(BDIR))
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$(error unable to locate BOARD $(BOARD))
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endif
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ifneq (1,$(words $(BDIR)))
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$(error multiple definitions for BOARD $(BOARD): $(BDIR))
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endif
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ifneq ($(filter private-%,$(BDIR)),)
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PDIR=$(subst /board/$(BOARD),,$(BDIR))
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endif
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PROJECT?=ec
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# Output directory for build objects
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ifdef CTS_MODULE
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# CTS builds need different directories per board per suite.
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out?=build/$(BOARD)/cts_$(CTS_MODULE)
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else
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out?=build/$(BOARD)
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endif
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# File containing configuration information
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config=$(out)/.config
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# If no key file is provided, use the default dev key
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PEM ?= $(BDIR)/dev_key.pem
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# If CONFIG_TOUCHPAD_HASH_FW is set, include hashes of a touchpad firmware in
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# the EC image (if no touchpad firmware is provided, just output blank hashes).
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TOUCHPAD_FW ?=
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include Makefile.toolchain
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# Define the traditional first target. The dependencies of this are near the
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# bottom as they can be altered by chip and board files.
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.PHONY: all
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all:
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# Returns the opposite of a configuration variable
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# y ->
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# ro -> rw
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# rw -> ro
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# -> y
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# usage: common-$(call not_cfg,$(CONFIG_FOO))+=bar.o
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not_cfg = $(subst ro rw,y,$(filter-out $(1:y=ro rw),ro rw))
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# The board makefile sets $CHIP and the chip makefile sets $CORE.
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# Include those now, since they must be defined for _flag_cfg below.
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include $(BDIR)/build.mk
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# Baseboard directory
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ifneq (,$(BASEBOARD))
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BASEDIR:=baseboard/$(BASEBOARD)
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CFLAGS_BASEBOARD=-DHAS_BASEBOARD -DBASEBOARD_$(UC_BASEBOARD)
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include $(BASEDIR)/build.mk
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else
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# If BASEBOARD is not defined, then assign BASEDIR to BDIR. This avoids
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# the need to have so many conditional checks wherever BASEDIR is used
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# below.
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BASEDIR:=$(BDIR)
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CFLAGS_BASEBOARD=
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endif
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include chip/$(CHIP)/build.mk
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# Create uppercase config variants, to avoid mixed case constants.
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# Also translate '-' to '_', so 'cortex-m' turns into 'CORTEX_M'. This must
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# be done before evaluating config.h.
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uppercase = $(shell echo $(1) | tr '[:lower:]-' '[:upper:]_')
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UC_BASEBOARD:=$(call uppercase,$(BASEBOARD))
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UC_BOARD:=$(call uppercase,$(BOARD))
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UC_CHIP:=$(call uppercase,$(CHIP))
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UC_CHIP_FAMILY:=$(call uppercase,$(CHIP_FAMILY))
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UC_CHIP_VARIANT:=$(call uppercase,$(CHIP_VARIANT))
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UC_CORE:=$(call uppercase,$(CORE))
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UC_PROJECT:=$(call uppercase,$(PROJECT))
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# Transform the configuration into make variables. This must be done after
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# the board/baseboard/project/chip/core variables are defined, since some of
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# the configs are dependent on particular configurations.
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includes=include core/$(CORE)/include $(dirs) $(out) test
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ifdef CTS_MODULE
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includes+=cts/$(CTS_MODULE) cts
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endif
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ifeq "$(TEST_BUILD)" "y"
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_tsk_lst_file:=ec.tasklist
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_tsk_lst_flags:=-Itest -DTEST_BUILD -imacros $(PROJECT).tasklist
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else ifdef CTS_MODULE
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_tsk_lst_file:=ec.tasklist
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_tsk_lst_flags:=-I cts/$(CTS_MODULE) -Icts -DCTS_MODULE=$(CTS_MODULE) \
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-imacros cts.tasklist
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else
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_tsk_lst_file:=$(PROJECT).tasklist
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_tsk_lst_flags:=
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endif
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_tsk_lst_flags+=-I$(BDIR) -DBOARD_$(UC_BOARD) -I$(BASEDIR) \
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-DBASEBOARD_$(UC_BASEBOARD) -D_MAKEFILE \
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-imacros $(_tsk_lst_file)
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_tsk_lst_ro:=$(shell $(CPP) -P -DSECTION_IS_RO \
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$(_tsk_lst_flags) include/task_filter.h)
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_tsk_lst_rw:=$(shell $(CPP) -P -DSECTION_IS_RW \
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$(_tsk_lst_flags) include/task_filter.h)
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_tsk_cfg_ro:=$(foreach t,$(_tsk_lst_ro) ,HAS_TASK_$(t))
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_tsk_cfg_rw:=$(foreach t,$(_tsk_lst_rw) ,HAS_TASK_$(t))
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_tsk_cfg:= $(filter $(_tsk_cfg_ro), $(_tsk_cfg_rw))
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_tsk_cfg_ro:= $(filter-out $(_tsk_cfg), $(_tsk_cfg_ro))
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_tsk_cfg_rw:= $(filter-out $(_tsk_cfg), $(_tsk_cfg_rw))
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CPPFLAGS_RO+=$(foreach t,$(_tsk_cfg_ro),-D$(t)) \
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$(foreach t,$(_tsk_cfg_rw),-D$(t)_RW)
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CPPFLAGS_RW+=$(foreach t,$(_tsk_cfg_rw),-D$(t)) \
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$(foreach t,$(_tsk_cfg_ro),-D$(t)_RO)
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CPPFLAGS+=$(foreach t,$(_tsk_cfg),-D$(t))
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# Get the CONFIG_ and VARIANT_ options that are defined for this target and make
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# them into variables available to this build script
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_flag_cfg_ro:=$(shell $(CPP) $(CPPFLAGS) -P -dM -Ichip/$(CHIP) \
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-I$(BASEDIR) -I$(BDIR) -DSECTION_IS_RO include/config.h | \
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grep -o "\#define \(CONFIG\|VARIANT\)_[A-Z0-9_]*" | cut -c9- | sort)
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_flag_cfg_rw:=$(_tsk_cfg_rw) $(shell $(CPP) $(CPPFLAGS) -P -dM -Ichip/$(CHIP) \
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-I$(BASEDIR) -I$(BDIR) -DSECTION_IS_RW include/config.h | \
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grep -o "\#define \(CONFIG\|VARIANT\)_[A-Z0-9_]*" | cut -c9- | sort)
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_flag_cfg:= $(filter $(_flag_cfg_ro), $(_flag_cfg_rw))
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_flag_cfg_ro:= $(filter-out $(_flag_cfg), $(_flag_cfg_ro))
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_flag_cfg_rw:= $(filter-out $(_flag_cfg), $(_flag_cfg_rw))
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$(foreach c,$(_tsk_cfg_rw) $(_flag_cfg_rw),$(eval $(c)=rw))
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$(foreach c,$(_tsk_cfg_ro) $(_flag_cfg_ro),$(eval $(c)=ro))
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$(foreach c,$(_tsk_cfg) $(_flag_cfg),$(eval $(c)=y))
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ifneq "$(CONFIG_COMMON_RUNTIME)" "y"
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_irq_list:=$(shell $(CPP) $(CPPFLAGS) -P -Ichip/$(CHIP) -I$(BASEDIR) \
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-I$(BDIR) -D"ENABLE_IRQ(x)=EN_IRQ x" \
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-imacros chip/$(CHIP)/registers.h \
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$(BDIR)/ec.irqlist | grep "EN_IRQ .*" | cut -c8-)
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CPPFLAGS+=$(foreach irq,$(_irq_list),\
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-D"irq_$(irq)_handler_optional=irq_$(irq)_handler")
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endif
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# Compute RW firmware size and offset
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_rw_off_str:=$(shell echo "CONFIG_RW_MEM_OFF" | $(CPP) $(CPPFLAGS) -P \
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-Ichip/$(CHIP) -I$(BASEDIR) -I$(BDIR) -imacros include/config.h)
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_rw_off:=$(shell echo "$$(($(_rw_off_str)))")
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_rw_size_str:=$(shell echo "CONFIG_RW_SIZE" | $(CPP) $(CPPFLAGS) -P \
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-Ichip/$(CHIP) -I$(BASEDIR) -I$(BDIR) -imacros include/config.h)
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_rw_size:=$(shell echo "$$(($(_rw_size_str)))")
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_program_memory_base_str:=$(shell echo "CONFIG_PROGRAM_MEMORY_BASE" | \
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$(CPP) $(CPPFLAGS) -P \
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-Ichip/$(CHIP) -I$(BDIR) -I$(BASEDIR) -imacros include/config.h)
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_program_memory_base=$(shell echo "$$(($(_program_memory_base_str)))")
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$(eval BASEBOARD_$(UC_BASEBOARD)=y)
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$(eval BOARD_$(UC_BOARD)=y)
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$(eval CHIP_$(UC_CHIP)=y)
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$(eval CHIP_VARIANT_$(UC_CHIP_VARIANT)=y)
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$(eval CHIP_FAMILY_$(UC_CHIP_FAMILY)=y)
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# Private subdirectories may call this from their build.mk
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# First arg is the path to be prepended to configured *.o files.
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# Second arg is the config variable (ie, "FOO" to select with $(FOO-$3)).
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# Third arg is the config variable value ("y" for configuration options
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# that are set for both RO and RW, "rw" for RW-only configuration options)
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objs_from_dir_p=$(foreach obj, $($(2)-$(3)), $(1)/$(obj))
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objs_from_dir=$(call objs_from_dir_p,$(1),$(2),y)
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# Get build configuration from sub-directories
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# Note that this re-includes the board and chip makefiles
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ifdef CTS_MODULE
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include cts/build.mk
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endif
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include $(BASEDIR)/build.mk
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ifneq ($(BASEDIR),$(BDIR))
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include $(BDIR)/build.mk
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endif
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include chip/$(CHIP)/build.mk
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include core/$(CORE)/build.mk
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include common/build.mk
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include driver/build.mk
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include power/build.mk
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-include private/build.mk
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ifneq ($(PDIR),)
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include $(PDIR)/build.mk
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endif
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include test/build.mk
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include util/build.mk
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include util/lock/build.mk
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includes+=$(includes-y)
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# Wrapper for fetching all the sources relevant to this build
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# target.
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# First arg is "y" indicating sources for all segments,
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# or "rw" indicating sources for rw segment.
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define get_sources =
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# Get sources to build for this target
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all-obj-$(1)+=$(call objs_from_dir_p,core/$(CORE),core,$(1))
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all-obj-$(1)+=$(call objs_from_dir_p,chip/$(CHIP),chip,$(1))
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all-obj-$(1)+=$(call objs_from_dir_p,$(BASEDIR),baseboard,$(1))
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all-obj-$(1)+=$(call objs_from_dir_p,$(BDIR),board,$(1))
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all-obj-$(1)+=$(call objs_from_dir_p,private,private,$(1))
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ifneq ($(PDIR),)
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all-obj-$(1)+=$(call objs_from_dir_p,$(PDIR),$(PDIR),$(1))
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endif
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all-obj-$(1)+=$(call objs_from_dir_p,common,common,$(1))
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all-obj-$(1)+=$(call objs_from_dir_p,driver,driver,$(1))
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all-obj-$(1)+=$(call objs_from_dir_p,power,power,$(1))
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ifdef CTS_MODULE
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all-obj-$(1)+=$(call objs_from_dir_p,cts,cts,$(1))
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endif
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all-obj-$(1)+=$(call objs_from_dir_p,test,$(PROJECT),$(1))
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endef
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# Get all sources to build
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$(eval $(call get_sources,y))
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$(eval $(call get_sources,ro))
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dirs=core/$(CORE) chip/$(CHIP) $(BASEDIR) $(BDIR) common power test \
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cts/common cts/$(CTS_MODULE)
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dirs+= private $(PDIR)
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dirs+=$(shell find common -type d)
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dirs+=$(shell find driver -type d)
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common_dirs=util
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ifeq ($(custom-ro_objs-y),)
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ro-common-objs := $(sort $(foreach obj, $(all-obj-y), $(out)/RO/$(obj)))
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ro-only-objs := $(sort $(foreach obj, $(all-obj-ro), $(out)/RO/$(obj)))
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ro-objs := $(sort $(ro-common-objs) $(ro-only-objs))
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else
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ro-objs := $(sort $(foreach obj, $(custom-ro_objs-y), $(out)/RO/$(obj)))
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endif
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# Add RW-only sources to build
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$(eval $(call get_sources,rw))
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rw-common-objs := $(sort $(foreach obj, $(all-obj-y), $(out)/RW/$(obj)))
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rw-only-objs := $(sort $(foreach obj, $(all-obj-rw), $(out)/RW/$(obj)))
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rw-objs := $(sort $(rw-common-objs) $(rw-only-objs))
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# Don't include the shared objects in the RO/RW image if we're enabling
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# the shared objects library.
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ifeq ($(CONFIG_SHAREDLIB),y)
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ro-objs := $(filter-out %_sharedlib.o, $(ro-objs))
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endif
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ro-deps := $(ro-objs:%.o=%.o.d)
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rw-deps := $(rw-objs:%.o=%.o.d)
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deps := $(ro-deps) $(rw-deps) $(deps-y)
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.PHONY: ro rw
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$(config): $(out)/$(PROJECT).bin
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@printf '%s=y\n' $(_tsk_cfg) $(_flag_cfg) > $@
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def_all_deps:=utils ro rw notice $(config) $(PROJECT_EXTRA) size
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all_deps?=$(def_all_deps)
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all: $(all_deps)
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ro: override BLD:=RO
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ro: $(libsharedobjs_elf-y) $(out)/RO/$(PROJECT).RO.flat
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rw: override BLD:=RW
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rw: $(libsharedobjs_elf-y) $(out)/RW/$(PROJECT).RW.flat
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# Shared objects library
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SHOBJLIB := libsharedobjs
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sharedlib-objs := $(filter %_sharedlib.o, $(all-obj-y))
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sharedlib-objs := $(foreach obj, $(sharedlib-objs), $(out)/$(SHOBJLIB)/$(obj))
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sharedlib-deps := $(sharedlib-objs:%.o=%.o.d)
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deps += $(sharedlib-deps)
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def_libsharedobjs_deps := $(sharedlib-objs)
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libsharedobjs_deps ?= $(def_libsharedobjs_deps)
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libsharedobjs-$(CONFIG_SHAREDLIB) := $(out)/$(SHOBJLIB)/$(SHOBJLIB).flat
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libsharedobjs_elf-$(CONFIG_SHAREDLIB) := \
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$(libsharedobjs-$(CONFIG_SHAREDLIB):%.flat=%.elf)
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libsharedobjs: $(libsharedobjs-y)
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include Makefile.rules
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export CROSS_COMPILE CFLAGS CC CPP LD NM AR OBJCOPY OBJDUMP

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