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ihb2032ihb2032
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rvv: add exp
Signed-off-by: ihb2032 <hebome@foxmail.com>
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‎src/layer/riscv/exp_riscv.cpp‎

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// Copyright 2026 ihb2032 <hebome@foxmail.com>
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// SPDX-License-Identifier: BSD-3-Clause
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#include "exp_riscv.h"
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#if __riscv_vector
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#include <riscv_vector.h>
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#include "rvv_mathfun.h"
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#endif // __riscv_vector
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#include "cpu.h"
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namespace ncnn {
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Exp_riscv::Exp_riscv()
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{
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#if __riscv_vector
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support_packing = true;
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#endif // __riscv_vector
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#if NCNN_ZFH
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#if __riscv_vector
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support_fp16_storage = cpu_support_riscv_zvfh();
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#else
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support_fp16_storage = cpu_support_riscv_zfh();
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#endif
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#endif
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}
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int Exp_riscv::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
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{
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#if NCNN_ZFH
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int elembits = bottom_top_blob.elembits();
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if (opt.use_fp16_storage && elembits == 16)
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{
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if (opt.use_fp16_arithmetic)
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return forward_inplace_fp16sa(bottom_top_blob, opt);
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else
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return forward_inplace_fp16s(bottom_top_blob, opt);
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}
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#endif
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int w = bottom_top_blob.w;
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int h = bottom_top_blob.h;
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int d = bottom_top_blob.d;
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int channels = bottom_top_blob.c;
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int elempack = bottom_top_blob.elempack;
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int size = w * h * d * elempack;
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if (base == -1.f)
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{
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#pragma omp parallel for num_threads(opt.num_threads)
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for (int q = 0; q < channels; q++)
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{
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float* ptr = bottom_top_blob.channel(q);
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#if __riscv_vector
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int n = size;
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while (n > 0)
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{
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size_t vl = __riscv_vsetvl_e32m8(n);
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vfloat32m8_t _p = __riscv_vle32_v_f32m8(ptr, vl);
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_p = __riscv_vfmul_vf_f32m8(_p, scale, vl);
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_p = __riscv_vfadd_vf_f32m8(_p, shift, vl);
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_p = exp_ps(_p, vl);
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__riscv_vse32_v_f32m8(ptr, _p, vl);
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ptr += vl;
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n -= vl;
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}
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#else // __riscv_vector
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for (int i = 0; i < size; i++)
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{
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ptr[i] = expf(shift + ptr[i] * scale);
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}
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#endif // __riscv_vector
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}
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return 0;
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}
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#pragma omp parallel for num_threads(opt.num_threads)
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for (int q = 0; q < channels; q++)
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{
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float* ptr = bottom_top_blob.channel(q);
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#if __riscv_vector
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int n = size;
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while (n > 0)
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{
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size_t vl = __riscv_vsetvl_e32m8(n);
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vfloat32m8_t _p = __riscv_vle32_v_f32m8(ptr, vl);
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_p = __riscv_vfmul_vf_f32m8(_p, scale, vl);
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_p = __riscv_vfadd_vf_f32m8(_p, shift, vl);
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_p = pow_ps(__riscv_vfmv_v_f_f32m8(base, vl), _p, vl);
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__riscv_vse32_v_f32m8(ptr, _p, vl);
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ptr += vl;
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n -= vl;
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}
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#else // __riscv_vector
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for (int i = 0; i < size; i++)
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{
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ptr[i] = powf(base, shift + ptr[i] * scale);
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}
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#endif // __riscv_vector
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}
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return 0;
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}
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} // namespace ncnn

‎src/layer/riscv/exp_riscv.h‎

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// Copyright 2026 ihb2032 <hebome@foxmail.com>
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// SPDX-License-Identifier: BSD-3-Clause
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#ifndef LAYER_EXP_RISCV_H
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#define LAYER_EXP_RISCV_H
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#include "exp.h"
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namespace ncnn {
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class Exp_riscv : public Exp
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{
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public:
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Exp_riscv();
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virtual int forward_inplace(Mat& bottom_top_blob, const Option& opt) const;
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protected:
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#if NCNN_ZFH
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int forward_inplace_fp16s(Mat& bottom_top_blob, const Option& opt) const;
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int forward_inplace_fp16sa(Mat& bottom_top_blob, const Option& opt) const;
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#endif
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};
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} // namespace ncnn
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#endif // LAYER_EXP_RISCV_H

‎src/layer/riscv/exp_riscv_zfh.cpp‎

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// Copyright 2026 ihb2032 <hebome@foxmail.com>
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// SPDX-License-Identifier: BSD-3-Clause
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#include "exp_riscv.h"
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#if __riscv_vector
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#include <riscv_vector.h>
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#include "rvv_mathfun.h"
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#if __riscv_zvfh
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#include "rvv_mathfun_fp16s.h"
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#endif
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#endif // __riscv_vector
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namespace ncnn {
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#if NCNN_ZFH
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int Exp_riscv::forward_inplace_fp16s(Mat& bottom_top_blob, const Option& opt) const
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{
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int w = bottom_top_blob.w;
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int h = bottom_top_blob.h;
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int d = bottom_top_blob.d;
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int channels = bottom_top_blob.c;
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int elempack = bottom_top_blob.elempack;
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int size = w * h * d * elempack;
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if (base == -1.f)
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{
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#pragma omp parallel for num_threads(opt.num_threads)
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for (int q = 0; q < channels; q++)
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{
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__fp16* ptr = bottom_top_blob.channel(q);
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#if __riscv_zvfh
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int n = size;
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while (n > 0)
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{
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size_t vl = __riscv_vsetvl_e16m4(n);
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vfloat32m8_t _p = __riscv_vfwcvt_f_f_v_f32m8(__riscv_vle16_v_f16m4(ptr, vl), vl);
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_p = __riscv_vfmul_vf_f32m8(_p, scale, vl);
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_p = __riscv_vfadd_vf_f32m8(_p, shift, vl);
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_p = exp_ps(_p, vl);
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__riscv_vse16_v_f16m4(ptr, __riscv_vfncvt_f_f_w_f16m4(_p, vl), vl);
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ptr += vl;
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n -= vl;
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}
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#else // __riscv_zvfh
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for (int i = 0; i < size; i++)
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{
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ptr[i] = (__fp16)expf(shift + (float)ptr[i] * scale);
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}
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#endif // __riscv_zvfh
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}
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return 0;
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}
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#pragma omp parallel for num_threads(opt.num_threads)
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for (int q = 0; q < channels; q++)
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{
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__fp16* ptr = bottom_top_blob.channel(q);
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#if __riscv_zvfh
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int n = size;
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while (n > 0)
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{
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size_t vl = __riscv_vsetvl_e16m4(n);
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vfloat32m8_t _p = __riscv_vfwcvt_f_f_v_f32m8(__riscv_vle16_v_f16m4(ptr, vl), vl);
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_p = __riscv_vfmul_vf_f32m8(_p, scale, vl);
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_p = __riscv_vfadd_vf_f32m8(_p, shift, vl);
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_p = pow_ps(__riscv_vfmv_v_f_f32m8(base, vl), _p, vl);
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__riscv_vse16_v_f16m4(ptr, __riscv_vfncvt_f_f_w_f16m4(_p, vl), vl);
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ptr += vl;
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n -= vl;
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}
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#else // __riscv_zvfh
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for (int i = 0; i < size; i++)
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{
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ptr[i] = (__fp16)powf(base, shift + (float)ptr[i] * scale);
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}
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#endif // __riscv_zvfh
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}
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return 0;
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}
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int Exp_riscv::forward_inplace_fp16sa(Mat& bottom_top_blob, const Option& opt) const
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{
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int w = bottom_top_blob.w;
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int h = bottom_top_blob.h;
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int d = bottom_top_blob.d;
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int channels = bottom_top_blob.c;
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int elempack = bottom_top_blob.elempack;
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int size = w * h * d * elempack;
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__fp16 _scale = (__fp16)scale;
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__fp16 _shift = (__fp16)shift;
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if (base == -1.f)
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{
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#pragma omp parallel for num_threads(opt.num_threads)
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for (int q = 0; q < channels; q++)
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{
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__fp16* ptr = bottom_top_blob.channel(q);
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#if __riscv_zvfh
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int n = size;
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while (n > 0)
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{
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size_t vl = __riscv_vsetvl_e16m8(n);
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vfloat16m8_t _p = __riscv_vle16_v_f16m8(ptr, vl);
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_p = __riscv_vfmul_vf_f16m8(_p, _scale, vl);
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_p = __riscv_vfadd_vf_f16m8(_p, _shift, vl);
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_p = exp_ps(_p, vl);
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__riscv_vse16_v_f16m8(ptr, _p, vl);
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ptr += vl;
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n -= vl;
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}
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#else // __riscv_zvfh
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for (int i = 0; i < size; i++)
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{
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ptr[i] = (__fp16)expf(shift + (float)ptr[i] * scale);
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}
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#endif // __riscv_zvfh
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}
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return 0;
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}
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#pragma omp parallel for num_threads(opt.num_threads)
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for (int q = 0; q < channels; q++)
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{
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__fp16* ptr = bottom_top_blob.channel(q);
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#if __riscv_zvfh
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int n = size;
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while (n > 0)
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{
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size_t vl = __riscv_vsetvl_e16m8(n);
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vfloat16m8_t _p = __riscv_vle16_v_f16m8(ptr, vl);
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_p = __riscv_vfmul_vf_f16m8(_p, _scale, vl);
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_p = __riscv_vfadd_vf_f16m8(_p, _shift, vl);
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_p = pow_ps(__riscv_vfmv_v_f_f16m8((__fp16)base, vl), _p, vl);
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__riscv_vse16_v_f16m8(ptr, _p, vl);
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ptr += vl;
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n -= vl;
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}
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#else // __riscv_zvfh
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for (int i = 0; i < size; i++)
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{
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ptr[i] = (__fp16)powf(base, shift + (float)ptr[i] * scale);
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}
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#endif // __riscv_zvfh
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}
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return 0;
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}
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#endif // NCNN_ZFH
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} // namespace ncnn

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