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Fix unconnected inputs of ram modules for gf12/swerv_wrapper
Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com>
1 parent 2149b02 commit 35771f7

1 file changed

Lines changed: 4 additions & 4 deletions

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flow/designs/gf12/swerv_wrapper/macros.v

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ module ram_2048x39(CLK, ADR, D, Q, WE);
1111
wire n_21;
1212
gf12_1rf_lg11_w40_all mem(.CLK (CLK), .Q ({Q_int[39], Q}), .CEN
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(1'b1), .GWEN (n_21), .A (ADR), .D ({1'b0, D}), .EMA (3'b011),
14-
.EMAW (2'b01), .RET1N (1'b1));
14+
.EMAW (2'b01), .EMAS (1'b0), .STOV (1'b0), .RET1N (1'b1));
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assign n_21 = ~(WE);
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endmodule
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@@ -28,7 +28,7 @@ module ram_64x21(CLK, ADR, D, Q, WE);
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wire n_16;
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gf12_1rf_lg6_w22_all mem(.CLK (CLK), .Q ({Q_int[21], Q}), .CEN
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(1'b1), .GWEN (n_16), .A (ADR), .D ({1'b0, D}), .EMA (3'b011),
31-
.EMAW (2'b01), .RET1N (1'b1));
31+
.EMAW (2'b01), .EMAS (1'b0), .STOV (1'b0), .RET1N (1'b1));
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assign n_16 = ~(WE);
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endmodule
3434

@@ -43,7 +43,7 @@ module ram_256x34(CLK, ADR, D, Q, WE);
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wire [33:0] Q;
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wire n_51;
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gf12_1rf_lg8_w34_all mem(.CLK (CLK), .Q (Q), .CEN (1'b1), .GWEN
46-
(n_51), .A (ADR), .D (D), .EMA (3'b011), .EMAW (2'b01), .RET1N
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(1'b1));
46+
(n_51), .A (ADR), .D (D), .EMA (3'b011), .EMAW (2'b01),
47+
.EMAS (1'b0), .STOV (1'b0), .RET1N (1'b1));
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assign n_51 = ~(WE);
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endmodule

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