flow: add OpenROAD built-in synth as _syn variant of every flat design

Adds OpenROAD's integrated synthesizer (sv_elaborate + synthesize,
OpenROAD #10473) as a universal "_syn" variant of every flat
design driven by design() in flow/designs/design.bzl. Relocates
and generalises the throwaway smoke target from OpenROAD #10479,
which explicitly said the proper home for this was bazel-orfs /
ORFS, not OpenROAD's test tree.

Purely additive: no existing Makefile recipe, bazel rule, design,
or target's behaviour is altered. Pieces:

- flow/scripts/synth_syn.tcl (new) -- povik's driver. Reads
  LEF/Liberty/SDC via the ORFS env vars and writes 1_synth.odb +
  1_synth.sdc directly, bypassing the Yosys 1_2_yosys.v ->
  synth_odb.tcl chain.
- flow/Makefile gains one new phony target do-syn-synth that
  invokes openroad on synth_syn.tcl. No existing recipe touched.
- patches/bazel-orfs/0002-...patch adds a parallel
  orfs_openroad_synth_rule + orfs_openroad_synth macro in
  bazel-orfs. OrfsInfo shape matches orfs_synth_rule, so
  orfs_flow(previous_stage = {"floorplan": ":<name>_syn_synth"})
  chains downstream stages unchanged. Vendored here until the
  integrated syn tool stabilises and this lands upstream.
- flow/designs/design.bzl -- design() now also emits the _syn
  chain for every flat design via a DESIGNS lookup + helper.
  Hierarchical designs (blocks non-empty) are skipped -- the
  built-in synthesizer doesn't handle BLOCKS yet. All _syn
  targets are tagged manual so bazel build //... is unaffected.

End state for every flat design:

  bazelisk build //flow/designs/asap7/gcd:gcd_syn_synth   # OpenROAD synth
  bazelisk build //flow/designs/asap7/gcd:gcd_synth       # Yosys (unchanged)

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Author: oharboe

MODULE.bazel

@@ -52,6 +52,7 @@ git_override(
     patch_strip = 1,
     patches = [
         "//patches/bazel-orfs:0001-render_gds-monkey-patch-PDK_CONFIGS-not-gdsii_use_custom_config.patch",
+        "//patches/bazel-orfs:0002-add-orfs_openroad_synth-rule-and-macro.patch",
     ],
     remote = BAZEL_ORFS_REMOTE,
 )

flow/Makefile

@@ -283,6 +283,18 @@ clean_synth:
 	rm -f $(SYNTH_STATS)
 	rm -f $(SDC_FILE_CLOCK_PERIOD)
 
+# Run Synthesis using OpenROAD's integrated synthesizer (sv_elaborate +
+# synthesize, OpenROAD #10473). Drives `synth_syn.tcl`, which reads
+# LEF/Liberty/SDC straight from the ORFS env vars and writes 1_synth.odb
+# + 1_synth.sdc directly -- bypassing the Yosys + synth_odb chain. Used
+# by the bazel-orfs `orfs_openroad_synth_rule` for the `_syn` flow
+# variant. Independent of the Yosys recipes above; either path can run.
+.PHONY: do-syn-synth
+do-syn-synth:
+	@mkdir -p $(RESULTS_DIR) $(LOG_DIR) $(REPORTS_DIR)
+	$(RUN_CMD) --log $(abspath $(LOG_DIR)/1_synth.log) --tee -- \
+		$(OPENROAD_CMD) $(SCRIPTS_DIR)/synth_syn.tcl
+
 # ==============================================================================
 #  _____ _     ___   ___  ____  ____  _        _    _   _
 # |  ___| |   / _ \ / _ \|  _ \|  _ \| |      / \  | \ | |

flow/designs/design.bzl

@@ -1,6 +1,7 @@
 """BUILD boilerplate for flow/designs/."""
 
-load("@orfs_designs//:designs.bzl", "orfs_design")
+load("@bazel-orfs//:openroad.bzl", "orfs_flow", "orfs_openroad_synth")
+load("@orfs_designs//:designs.bzl", "DESIGNS", "orfs_design")
 
 # Per filegroup target: extensions included in the filegroup.
 # bazel-orfs's config_mk_parser produces these target names from
@@ -76,6 +77,7 @@ def design(config = "config.mk", user_arguments = [], user_sources = [], local_a
         local_arguments = local_arguments,
         blender = True,
     )
+    _emit_syn_variant(DESIGNS.get(_design_key()))
 
 def files(group, extra_srcs = None):
     """Named filegroup over conventional extensions.
@@ -94,3 +96,60 @@ def files(group, extra_srcs = None):
         visibility = ["//visibility:public"],
     )
     _export_design_files()
+
+def _design_key():
+    """Map this BUILD package to its DESIGNS key.
+
+    `native.package_name()` looks like `flow/designs/<platform>/<dir>`;
+    the DESIGNS dict is keyed by `<platform>/<dir>` (bazel-orfs's
+    config_mk_parser also indexes by directory name when it differs
+    from the nickname). Returns "" for packages outside that layout
+    so the lookup misses cleanly.
+    """
+    parts = native.package_name().split("/")
+    if len(parts) < 2:
+        return ""
+    return "{}/{}".format(parts[-2], parts[-1])
+
+def _emit_syn_variant(entry):
+    """Emit the `_syn` variant chain for `entry` from DESIGNS.
+
+    Adds `<name>_syn_synth` (built-in OpenROAD synth, driven by
+    flow/scripts/synth_syn.tcl) plus the downstream `_syn_*` chain
+    via `orfs_flow(variant = "syn", previous_stage = {...})`.
+
+    No-op for hierarchical designs (`entry["blocks"]` non-empty); the
+    built-in synthesizer doesn't handle BLOCKS yet and those would
+    just fail. Flat designs pick the variant up for free.
+
+    All emitted targets are tagged `manual` so `bazel build //...`
+    does not pick them up while the OpenROAD synth tool (PR #10473)
+    matures.
+    """
+    if entry == None or entry.get("blocks"):
+        return
+    name = entry["name"]
+    pdk = "//flow:" + entry["platform"]
+    syn_args = dict(entry["arguments"])
+    syn_synth = name + "_syn_synth"
+    orfs_openroad_synth(
+        name = syn_synth,
+        module_top = name,
+        verilog_files = entry["verilog_files"],
+        sources = entry["sources"],
+        arguments = syn_args,
+        pdk = pdk,
+        variant = "syn",
+        tags = ["manual"],
+    )
+    orfs_flow(
+        name = name,
+        variant = "syn",
+        verilog_files = entry["verilog_files"],
+        sources = entry["sources"],
+        arguments = syn_args,
+        pdk = pdk,
+        previous_stage = {"floorplan": ":" + syn_synth},
+        tags = ["manual"],
+        test_kwargs = {"tags": ["orfs", "manual"]},
+    )

flow/scripts/synth_syn.tcl

@@ -0,0 +1,74 @@
+utl::set_metrics_stage "synthesis__{}"
+source $::env(SCRIPTS_DIR)/load.tcl
+erase_non_stage_variables synth
+
+source_env_var_if_exists PLATFORM_TCL
+source $::env(SCRIPTS_DIR)/read_liberty.tcl
+
+read_lef $::env(TECH_LEF)
+read_lef $::env(SC_LEF)
+if { [env_var_exists_and_non_empty ADDITIONAL_LEFS] } {
+  foreach lef $::env(ADDITIONAL_LEFS) {
+    read_lef $lef
+  }
+}
+set_dont_use $::env(DONT_USE_CELLS)
+
+# Setup verilog include directories
+set vIdirsArgs ""
+if { [env_var_exists_and_non_empty VERILOG_INCLUDE_DIRS] } {
+  foreach dir $::env(VERILOG_INCLUDE_DIRS) {
+    lappend vIdirsArgs "-I$dir"
+  }
+  set vIdirsArgs [join $vIdirsArgs]
+}
+
+set elaborate_args [list \
+	-D SYNTHESIS --compat=vcs --ignore-assertions --no-implicit-memories --top $::env(DESIGN_NAME) \
+	{*}$vIdirsArgs {*}[env_var_or_empty VERILOG_DEFINES]]
+
+lappend elaborate_args {*}$::env(VERILOG_FILES)
+
+# Apply top-level parameters
+dict for {key value} [env_var_or_empty VERILOG_TOP_PARAMS] {
+	lappend elaborate_args -G "$key=$value"
+}
+
+# Apply module blackboxing based on module names as they appear
+# in the input, that is before any module name mangling done
+# by elaboration and synthesis
+if { [env_var_exists_and_non_empty SYNTH_BLACKBOXES] } {
+  foreach m $::env(SYNTH_BLACKBOXES) {
+    lappend elaborate_args --blackboxed-module "$m"
+  }
+}
+
+lappend elaborate_args {*}$::env(SYNTH_SLANG_ARGS)
+
+# If the sources are solely .v files, enable Verilog compatibility
+set has_non_v_files false
+foreach fn $::env(VERILOG_FILES) {
+  if { [file extension [string trim $fn]] != ".v" } {
+    set has_non_v_files true
+  }
+}
+if { !$has_non_v_files } {
+  lappend elaborate_args --std=1364-2005
+}
+
+sv_elaborate {*}$elaborate_args
+syn::stats
+
+if {$::env(DESIGN_NAME) == "cva6"} {
+  syn::remove_ports rvfi_probes_o
+}
+synthesize
+
+read_sdc $::env(SDC_FILE)
+
+orfs_write_db $::env(RESULTS_DIR)/1_synth.odb
+# Canonicalize 1_synth.sdc. The original SDC_FILE provided by
+# the user could have dependencies, such as sourcing util.tcl,
+# which are read in here and a canonicalized version is written
+# out by OpenSTA that has no dependencies.
+orfs_write_sdc $::env(RESULTS_DIR)/1_synth.sdc