gt2n: revert local tap-cell rename to match upstream GDS

Upstream commit 42e1034 ("Update gt2_6t_w31_lvt.lef") moves the BPR
shapes on the tap cell from OBS to PORT (the issue #12 fix we
needed), but in the same commit it also renames the macro
`gt2_6t_tap_w31_lvt` into a split `gt2_6t_tapfspdn_w31_lvt` /
`gt2_6t_tapbspdn_w31_lvt` pair in the LEF and lib. The matching GDS
cells for the new names were not added upstream
(azadnaeemi/GT2N#16), so the post-rename PDK is internally
inconsistent: the LEF/lib advertise two new tap-cell names, but
neither exists in the GDS, only the original `gt2_6t_tap_w31_lvt`
does. KLayout GDS-merge at the end of the flow cannot resolve the
tap instances and the final GDS is incomplete.

Keep the BPR PORT geometry from the upstream commit (this is the
fix we wanted) but undo the rename here: collapse the LEF macros
and lib cells back into a single `gt2_6t_tap_w31_lvt`, point
TAP_CELL_NAME and DONT_USE_CELLS at it, and update the README to
explain the situation and link to the upstream issue tracking the
GDS gap. Revisit once upstream #16 is resolved.

Smoke: gt2n/gcd 2_3_floorplan_tapcell clean (110 endcaps + 28
tapcells inserted).

Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>

Author: mguthaus

flow/platforms/gt2n/README.md

@@ -1,6 +1,6 @@
 # GT2N PDK
 
-> **Source:** copied verbatim from [azadnaeemi/GT2N](https://github.com/azadnaeemi/GT2N) at commit [`54f81feb2b`](https://github.com/azadnaeemi/GT2N/commit/54f81feb2b9c334d283538c1bc91bf3a34b02c02) (2026-06-05). This release split the original `gt2_6t_tap_w31_lvt` into a frontside-PDN variant (`gt2_6t_tapfspdn_w31_lvt`) and a backside-PDN variant (`gt2_6t_tapbspdn_w31_lvt`); the latter is what this ORFS platform points `TAP_CELL_NAME` at, since the PDN here is backside-only. Resolves the original BPR `OBS` → `PORT` issue ([azadnaeemi/GT2N#12](https://github.com/azadnaeemi/GT2N/issues/12)).
+> **Source:** copied from [azadnaeemi/GT2N](https://github.com/azadnaeemi/GT2N) at commit [`54f81feb2b`](https://github.com/azadnaeemi/GT2N/commit/54f81feb2b9c334d283538c1bc91bf3a34b02c02) (2026-06-05), which incorporates the BPR `OBS` → `PORT` fix from [azadnaeemi/GT2N#12](https://github.com/azadnaeemi/GT2N/issues/12). That commit also renames the tap cell `gt2_6t_tap_w31_lvt` into a `gt2_6t_tapfspdn_w31_lvt` / `gt2_6t_tapbspdn_w31_lvt` pair in the LEF and lib, but the matching GDS cells for the new names were not added upstream ([azadnaeemi/GT2N#16](https://github.com/azadnaeemi/GT2N/issues/16)). To keep the LEF, lib, and GDS consistent so KLayout GDS-merge resolves the tap instances at flow exit, this local copy keeps the BPR PORT geometry but undoes the rename: there is one macro / lib cell `gt2_6t_tap_w31_lvt`, matching the single tap cell still present in the GDS. Revisit once upstream resolves #16.
 
 <img src="./VirtualFabricationDemo.gif" alt="VirtualFabricationDemo" width="400">
 

flow/platforms/gt2n/config.mk

@@ -16,8 +16,8 @@ export GDS_FILES = $(PLATFORM_DIR)/gds/gt2_6t_std_cells_w31_lvt.gds \
                    $(ADDITIONAL_GDS)
 
 # Cells that should not be used in synthesis/optimization
-export DONT_USE_CELLS = gt2_6t_filler_w31_lvt gt2_6t_tapbspdn_w31_lvt \
-                       gt2_6t_tapfspdn_w31_lvt gt2_6t_decapcc_w31_lvt \
+export DONT_USE_CELLS = gt2_6t_filler_w31_lvt gt2_6t_tap_w31_lvt \
+                       gt2_6t_decapcc_w31_lvt \
                        gt2_6t_tiehigh_w31_lvt gt2_6t_tielow_w31_lvt
 
 # Fill cells used in fill cell insertion
@@ -56,7 +56,7 @@ export PDN_TCL ?= $(PLATFORM_DIR)/pdn.tcl
 
 # Endcap and Welltie cells
 export TAPCELL_TCL ?= $(PLATFORM_DIR)/tapcell.tcl
-export TAP_CELL_NAME = gt2_6t_tapbspdn_w31_lvt
+export TAP_CELL_NAME = gt2_6t_tap_w31_lvt
 
 export MACRO_PLACE_HALO ?= 1.0 1.0
 

flow/platforms/gt2n/lef/gt2_6t_w31_lvt.lef

@@ -4549,12 +4549,12 @@ MACRO gt2_6t_or3_x1_w31_lvt
   END
 END gt2_6t_or3_x1_w31_lvt
 
-MACRO gt2_6t_tapfspdn_w31_lvt
+MACRO gt2_6t_tap_w31_lvt
   CLASS CORE  ;
   ORIGIN 0 0 ;
   SYMMETRY X Y ;
   SITE gt2_6t ;
-    FOREIGN gt2_6t_tapfspdn_w31_lvt 0 0 ;
+    FOREIGN gt2_6t_tap_w31_lvt 0 0 ;
   SIZE 0.084 BY 0.144 ;
   PIN vdd
     DIRECTION INOUT ;
@@ -4581,32 +4581,7 @@ MACRO gt2_6t_tapfspdn_w31_lvt
       RECT 0.01 0.042 0.0755 0.054 ;
       RECT 0.01 0.09 0.034 0.102 ;
   END
-END gt2_6t_tapfspdn_w31_lvt
-
-MACRO gt2_6t_tapbspdn_w31_lvt
-  CLASS CORE  ;
-  ORIGIN 0 0 ;
-  SYMMETRY X Y ;
-  SITE gt2_6t ;
-    FOREIGN gt2_6t_tapbspdn_w31_lvt 0 0 ;
-  SIZE 0.042 BY 0.144 ;
-  PIN vdd
-    DIRECTION INOUT ;
-    USE POWER ;
-    PORT
-      LAYER BPR ;
-        RECT 0 0.128 0.042 0.16 ;
-    END
-  END vdd
-  PIN vss
-    DIRECTION INOUT ;
-    USE GROUND ;
-    PORT
-      LAYER BPR ;
-        RECT 0 -0.016 0.042 0.016 ;
-    END
-  END vss
-END gt2_6t_tapbspdn_w31_lvt
+END gt2_6t_tap_w31_lvt
 
 MACRO gt2_6t_tiehigh_w31_lvt
   CLASS CORE  ;

flow/platforms/gt2n/lib/gt2_6t_w31_lvt_tt_0p7v25c.lib

@@ -22275,7 +22275,7 @@ library(gt2_6t_w31_lvt_tt_0p7v25c) {
     }
   }
 
-  cell (gt2_6t_tapfspdn_w31_lvt) {
+  cell (gt2_6t_tap_w31_lvt) {
     cell_leakage_power : 0 ;
     area : 0.012096;
 
@@ -22290,19 +22290,4 @@ library(gt2_6t_w31_lvt_tt_0p7v25c) {
     }
   }
 
-  cell (gt2_6t_tapbspdn_w31_lvt) {
-    cell_leakage_power : 0 ;
-    area : 0.006048;
-
-    pg_pin(vdd) {
-      pg_type : primary_power ;
-      voltage_name : vdd ;
-    }
-
-    pg_pin(vss) {
-      pg_type : primary_ground ;
-      voltage_name : vss ;
-    }
-  }
-
 }