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20 changes: 20 additions & 0 deletions flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/config.mk
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
export DESIGN_NAME = I2cDeviceCtrl
export TOP_DESIGN_NICKNAME = i2c-gpio-expander
export DESIGN_NICKNAME = ${TOP_DESIGN_NICKNAME}_${DESIGN_NAME}
export PLATFORM = ihp-sg13g2

export VERILOG_FILES = $(DESIGN_HOME)/$(PLATFORM)/${TOP_DESIGN_NICKNAME}/I2cGpioExpander.v \

export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(TOP_DESIGN_NICKNAME)/${DESIGN_NAME}/constraint.sdc

export DIE_AREA = 0.0 0.0 147.84 147.42
export CORE_AREA = 18.72 18.9 128.64 128.52

export MAX_ROUTING_LAYER = TopMetal2

export TNS_END_PERCENT = 100
export PLACE_DENSITY = 0.75

export CORNERS = slow typ fast

export PDN_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(TOP_DESIGN_NICKNAME)/${DESIGN_NAME}/pdn.tcl
Original file line number Diff line number Diff line change
@@ -0,0 +1,22 @@
current_design I2cDeviceCtrl/I2cDeviceCtrl
set_units -time ns -resistance kOhm -capacitance pF -voltage V -current uA
set_max_fanout 8 [current_design]
set_max_capacitance 0.5 [current_design]
set_max_transition 3 [current_design]
set_max_area 0

create_clock [get_ports clock] -name clock -period 20.0 -waveform {0 10.0}
set_ideal_network [get_ports clock]
set_clock_uncertainty 0.15 [get_clocks clock]
set_clock_transition 0.25 [get_clocks clock]
set input_delay_value_clock 4.0
set output_delay_value_clock 4.0
set clk_indx_clock [lsearch [all_inputs] [get_port clock]]
set all_inputs_wo_clk_rst_clock [lreplace [all_inputs] $clk_indx_clock $clk_indx_clock ""]
set_input_delay $input_delay_value_clock -clock [get_clocks clock] $all_inputs_wo_clk_rst_clock
set_output_delay $output_delay_value_clock -clock [get_clocks clock] [all_outputs]

set_load -pin_load 5 [all_inputs]
set_load -pin_load 5 [all_outputs]
set_timing_derate -early 0.95
set_timing_derate -late 1.05
34 changes: 34 additions & 0 deletions flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/pdn.tcl
Original file line number Diff line number Diff line change
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# standard cells
add_global_connection -net {VDD} -pin_pattern {^VDD$} -power
add_global_connection -net {VDD} -pin_pattern {^VDDPE$}
add_global_connection -net {VDD} -pin_pattern {^VDDCE$}
add_global_connection -net {VSS} -pin_pattern {^VSS$} -ground
add_global_connection -net {VSS} -pin_pattern {^VSSE$}

# macros
add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {VDD!} -power
add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VSS!} -ground
add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {^VDD$} -power
add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {^VSS$} -ground

# padframe core power pins
add_global_connection -net {VDD} -pin_pattern {^vdd$} -power
add_global_connection -net {VSS} -pin_pattern {^vss$} -ground

# padframe io power pins
add_global_connection -net {IOVDD} -pin_pattern {^iovdd$} -power
add_global_connection -net {IOVSS} -pin_pattern {^iovss$} -ground

global_connect

# core voltage domain
set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}

# stdcell grid
define_pdn_grid -name {grid} -voltage_domains {CORE}
add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} -followpins -extend_to_core_ring
add_pdn_ring -grid {grid} -layers {Metal3 Metal4} -widths {3.0} -spacings {2.0} -core_offsets {4.5} -connect_to_pads
add_pdn_stripe -grid {grid} -layer {Metal3} -width {1.840} -pitch {75.6} -offset {37.8} -extend_to_core_ring
add_pdn_stripe -grid {grid} -layer {Metal4} -width {1.840} -pitch {75.6} -offset {37.8} -extend_to_core_ring
add_pdn_connect -grid {grid} -layers {Metal1 Metal3}
add_pdn_connect -grid {grid} -layers {Metal3 Metal4}
4 changes: 3 additions & 1 deletion flow/designs/ihp-sg13g2/i2c-gpio-expander/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
export SEAL_GDS = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/sealring.gds.gz

export DIE_AREA = 0.0 0.0 1050.0 1050.0
export CORE_AREA = 425.28 427.16 631.2 630.24
export CORE_AREA = 351.36 351.54 699.84 699.3

export MAX_ROUTING_LAYER = TopMetal2

Expand All @@ -20,3 +20,5 @@ export CORNERS = slow fast

export FOOTPRINT_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/pad.tcl
export PDN_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/pdn.tcl

export BLOCKS = I2cDeviceCtrl
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