Skip to content

updated clock periods for rapidus2hp designs to get negative slack #3364

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
maliberty merged 1 commit into from
Jul 30, 2025
Merged

updated clock periods for rapidus2hp designs to get negative slack #3364

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion flow/designs/rapidus2hp/ethmac/constraint.sdc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ set_output_delay [expr { $tx_clk_period * $clk_io_pct }] -clock $tx_clk_name \

set rx_clk_name mrx_clk_pad_i
set rx_clk_port [get_ports $rx_clk_name]
set rx_clk_period 300
set rx_clk_period 200
create_clock -name $rx_clk_name -period $rx_clk_period $rx_clk_port
set mrx_non_clock_inputs [lsearch -inline -all -not -exact [all_inputs] \
$rx_clk_port]
Expand Down
2 changes: 1 addition & 1 deletion flow/designs/rapidus2hp/gcd/constraint.sdc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ current_design gcd

set clk_name core_clock
set clk_port_name clk
set clk_period 185
set clk_period 150
set clk_io_pct 0.2

set clk_port [get_ports $clk_port_name]
Expand Down