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malibertymaliberty
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Merge pull request #10093 from The-OpenROAD-Project-staging/mbff_pin_name
store original pin names during mbff clustering, add regressions,
2 parents e1ccc99 + ffbdcd8 commit 33c72bf

6 files changed

Lines changed: 155 additions & 5 deletions

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‎src/gpl/src/mbff.cpp‎

Lines changed: 38 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -861,18 +861,27 @@ void MBFF::ModifyPinConnections(const std::vector<Flop>& flops,
861861
}
862862
}
863863

864-
// disconnect / reconnect iterms
864+
// Classify each original iterm and record its tray-port mapping
865+
// *before* disconnecting, then disconnect/reconnect and store the
866+
// original pin name as a property on the tray instance.
867+
const std::string orig_inst_name(insts_[flops[i].idx]->getName());
865868
for (dbITerm* iterm : insts_[flops[i].idx]->getITerms()) {
869+
// Classify while the iterm is still connected.
870+
const bool is_d = IsDPin(iterm);
871+
const bool is_q = !is_d && IsQPin(iterm);
872+
const bool is_qn_inv = is_q && IsInvertingQPin(iterm);
873+
const std::string orig_port_name = iterm->getMTerm()->getName();
874+
866875
dbNet* net = iterm->getNet();
867876
while (net) {
868877
iterm->disconnect();
869878

870879
// standard pins
871-
if (IsDPin(iterm)) {
880+
if (is_d) {
872881
tray_inst[tray_idx]->findITerm(d_pin->name().c_str())->connect(net);
873882
}
874-
if (IsQPin(iterm)) {
875-
if (IsInvertingQPin(iterm)) {
883+
if (is_q) {
884+
if (is_qn_inv) {
876885
tray_inst[tray_idx]
877886
->findITerm(qn_pin->name().c_str())
878887
->connect(net);
@@ -914,6 +923,31 @@ void MBFF::ModifyPinConnections(const std::vector<Flop>& flops,
914923

915924
net = iterm->getNet();
916925
}
926+
927+
// Store original FF→tray pin mapping as a property on the tray
928+
// instance so timing reports can display the original pin name.
929+
std::string tray_port;
930+
if (is_d && d_pin) {
931+
tray_port = d_pin->name();
932+
} else if (is_q) {
933+
if (is_qn_inv && qn_pin) {
934+
tray_port = qn_pin->name();
935+
} else if (q_pin) {
936+
tray_port = q_pin->name();
937+
}
938+
}
939+
if (!tray_port.empty()) {
940+
const std::string key = "orig_name_" + tray_port;
941+
const std::string val = orig_inst_name + "/" + orig_port_name;
942+
odb::dbStringProperty* prop
943+
= odb::dbStringProperty::find(tray_inst[tray_idx], key.c_str());
944+
if (prop) {
945+
prop->setValue(val.c_str());
946+
} else {
947+
odb::dbStringProperty::create(
948+
tray_inst[tray_idx], key.c_str(), val.c_str());
949+
}
950+
}
917951
}
918952
}
919953

‎src/gpl/test/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ or_integration_tests(
77
clust02
88
clust03
99
cluster_place01
10+
mbff_orig_name
1011
convergence01
1112
core01
1213
density01

‎src/gpl/test/mbff_orig_name.def‎

Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,41 @@
1+
VERSION 5.8 ;
2+
DIVIDERCHAR "/" ;
3+
BUSBITCHARS "[]" ;
4+
DESIGN tray_test ;
5+
UNITS DISTANCE MICRONS 1000 ;
6+
DIEAREA ( 0 0 ) ( 10000 10000 ) ;
7+
8+
9+
COMPONENTS 4 ;
10+
- ff1 DFFHQNx1_ASAP7_75t_L + PLACED ( 6000 6000 ) N ;
11+
- ff2 DFFHQNx1_ASAP7_75t_L + PLACED ( 4000 6000 ) N ;
12+
- ff3 DFFHQNx1_ASAP7_75t_L + PLACED ( 4000 4000 ) N ;
13+
- ff4 DFFHQNx1_ASAP7_75t_L + PLACED ( 6000 4000 ) N ;
14+
END COMPONENTS
15+
16+
PINS 1 ;
17+
- clk1 + NET clk1 + DIRECTION INPUT + USE SIGNAL + FIXED ( 0 0 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
18+
- d1 + NET d1 + DIRECTION INPUT + USE SIGNAL + FIXED ( 360 0 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
19+
- d2 + NET d2 + DIRECTION INPUT + USE SIGNAL + FIXED ( 540 0 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
20+
- d3 + NET d3 + DIRECTION INPUT + USE SIGNAL + FIXED ( 720 0 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
21+
- d4 + NET d4 + DIRECTION INPUT + USE SIGNAL + FIXED ( 900 0 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
22+
- o1 + NET o1 + DIRECTION INPUT + USE SIGNAL + FIXED ( 360 10000 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
23+
- o2 + NET o2 + DIRECTION INPUT + USE SIGNAL + FIXED ( 540 10000 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
24+
- o3 + NET o3 + DIRECTION INPUT + USE SIGNAL + FIXED ( 720 10000 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
25+
- o4 + NET o4 + DIRECTION INPUT + USE SIGNAL + FIXED ( 900 10000 ) N + LAYER M1 ( 0 0 ) ( 180 180 ) ;
26+
END PINS
27+
28+
29+
NETS 1 ;
30+
- clk1 ( PIN clk1 ) ( ff1 CLK ) ( ff2 CLK ) ( ff3 CLK ) ( ff4 CLK ) + USE SIGNAL ;
31+
- d1 ( PIN d1 ) ( ff1 D ) + USE SIGNAL ;
32+
- d2 ( PIN d2 ) ( ff2 D ) + USE SIGNAL ;
33+
- d3 ( PIN d3 ) ( ff3 D ) + USE SIGNAL ;
34+
- d4 ( PIN d4 ) ( ff4 D ) + USE SIGNAL ;
35+
- o1 ( PIN o1 ) ( ff1 QN ) + USE SIGNAL ;
36+
- o2 ( PIN o2 ) ( ff2 QN ) + USE SIGNAL ;
37+
- o3 ( PIN o3 ) ( ff3 QN ) + USE SIGNAL ;
38+
- o4 ( PIN o4 ) ( ff4 QN ) + USE SIGNAL ;
39+
END NETS
40+
41+
END DESIGN

‎src/gpl/test/mbff_orig_name.ok‎

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,45 @@
1+
[INFO ODB-0227] LEF file: ./asap7/asap7_tech_1x_201209.lef, created 30 layers, 9 vias
2+
[INFO ODB-0227] LEF file: ./SingleBit/asap7sc7p5t_28_L_1x_220121a.lef, created 212 library cells
3+
[INFO ODB-0227] LEF file: ./2BitTrayH2/asap7sc7p5t_DFFHQNV2X.lef, created 9 library cells
4+
[INFO ODB-0394] Duplicate site asap7sc7p5t_pg in asap7sc7p5t_DFFHQNV4X already seen in asap7sc7p5t_DFFHQNV2X
5+
[INFO ODB-0227] LEF file: ./4BitTrayH4/asap7sc7p5t_DFFHQNV4X.lef, created 9 library cells
6+
[INFO ODB-0394] Duplicate site asap7sc7p5t_pg in asap7sc7p5t_DFFHQNH2V2X already seen in asap7sc7p5t_DFFHQNV2X
7+
[INFO ODB-0227] LEF file: ./4BitTrayH2W2/asap7sc7p5t_DFFHQNH2V2X.lef, created 9 library cells
8+
[INFO ODB-0128] Design: tray_test
9+
[INFO ODB-0130] Created 9 pins.
10+
[INFO ODB-0131] Created 4 components and 20 component-terminals.
11+
[INFO ODB-0133] Created 9 nets and 12 connections.
12+
Alpha = 40.0, Beta = 1.0, #paths = 0, max size = -1
13+
Total ILP Cost: 97.228
14+
Total Timing Critical Path Displacement: 0.0
15+
Average slot-to-flop displacement: 0.865
16+
Final Objective Value: 97.228
17+
Sizes used
18+
2-bit: 2
19+
Startpoint: d1 (input port clocked by clk)
20+
Endpoint: _tray_size2_7 (rising edge-triggered flip-flop clocked by clk)
21+
Path Group: clk
22+
Path Type: max
23+
24+
Delay Time Description Orig Name
25+
---------------------------------------------------------------------------------------------
26+
0.00 0.00 clock clk (rise edge)
27+
0.00 0.00 clock network delay (ideal)
28+
0.00 0.00 ^ input external delay
29+
0.00 0.00 ^ d1 (in)
30+
0.00 0.00 ^ _tray_size2_7/D1 (DFFHQNV2Xx1_ASAP7_75t_L) ff1/D
31+
0.00 data arrival time
32+
33+
1000.00 1000.00 clock clk (rise edge)
34+
0.00 1000.00 clock network delay (ideal)
35+
0.00 1000.00 clock reconvergence pessimism
36+
1000.00 ^ _tray_size2_7/CLK (DFFHQNV2Xx1_ASAP7_75t_L)
37+
-22.99 977.01 library setup time
38+
977.01 data required time
39+
---------------------------------------------------------------------------------------------
40+
977.01 data required time
41+
-0.00 data arrival time
42+
---------------------------------------------------------------------------------------------
43+
977.01 slack (MET)
44+
45+

‎src/gpl/test/mbff_orig_name.tcl‎

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
source helpers.tcl
2+
set test_name mbff_orig_name
3+
4+
read_lef ./asap7/asap7_tech_1x_201209.lef
5+
read_lef ./SingleBit/asap7sc7p5t_28_L_1x_220121a.lef
6+
read_lib ./SingleBit/asap7sc7p5t_SEQ_LVT_TT_nldm_220123.lib
7+
8+
read_lef ./2BitTrayH2/asap7sc7p5t_DFFHQNV2X.lef
9+
read_lib ./2BitTrayH2/asap7sc7p5t_DFFHQNV2X_LVT_TT_nldm_FAKE.lib
10+
11+
read_lef ./4BitTrayH4/asap7sc7p5t_DFFHQNV4X.lef
12+
read_lib ./4BitTrayH4/asap7sc7p5t_DFFHQNV4X_LVT_TT_nldm_FAKE.lib
13+
14+
read_lef ./4BitTrayH2W2/asap7sc7p5t_DFFHQNH2V2X.lef
15+
read_lib ./4BitTrayH2W2/asap7sc7p5t_DFFHQNH2V2X_LVT_TT_nldm_FAKE.lib
16+
17+
read_def ./$test_name.def
18+
19+
create_clock -name clk -period 1000 [get_ports clk1]
20+
set_input_delay -clock clk 0 [get_ports {d1 d2 d3 d4}]
21+
22+
cluster_flops -tray_weight 40.0 \
23+
-timing_weight 1.0 \
24+
-max_split_size -1 \
25+
-num_paths 0
26+
27+
# Report timing to verify original FF names appear in the path report.
28+
# After clustering the tray pin descriptions should show in the Orig Name column.
29+
report_checks -path_delay max -fields {orig_name} -through [get_pins _tray_size2_7/D1]

‎src/sta‎

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