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Expand file tree Collapse file tree Original file line number Diff line number Diff line change @@ -1275,9 +1275,10 @@ void HTreeBuilder::run()
12751275 logger_->info (CTS ,
12761276 38 ,
12771277 " Stop criterion found. Sink region hpwl "
1278- " is smaller than max wirelength ({}) and max number of "
1279- " sinks is {}." ,
1280- options_->getMaxWl () / options_->getWireSegmentUnit (),
1278+ " is smaller than max wirelength ({:.3f} um) and max "
1279+ " number of sinks is {}." ,
1280+ static_cast <double >(options_->getMaxWl ())
1281+ / options_->getDbUnits (),
12811282 options_->getMaxFanout () ? options_->getMaxFanout ()
12821283 : numMaxLeafSinks_);
12831284 break ;
Original file line number Diff line number Diff line change 6666 Sinks per sub-region: 1
6767 Sub-region size: 41.2500 X 79.5345
6868[INFO CTS-0034] Segment length (rounded): 20.
69- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (49 ) and max number of sinks is 15.
69+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
7070[INFO CTS-0035] Number of sinks covered: 120.
7171[INFO CTS-0201] 225 blockages from hard placement blockages and placed macros will be used.
7272[INFO CTS-0027] Generating H-Tree topology for net clk_regs.
115115 Sinks per sub-region: 2
116116 Sub-region size: 58.9286 X 41.7500
117117[INFO CTS-0034] Segment length (rounded): 20.
118- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (49 ) and max number of sinks is 15.
118+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
119119[INFO CTS-0035] Number of sinks covered: 136.
120120[INFO CTS-0018] Created 453 clock buffers.
121121[INFO CTS-0012] Minimum number of buffers in the clock path: 21.
Original file line number Diff line number Diff line change 6666 Sinks per sub-region: 1
6767 Sub-region size: 41.2500 X 79.5345
6868[INFO CTS-0034] Segment length (rounded): 20.
69- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (49 ) and max number of sinks is 15.
69+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
7070[INFO CTS-0035] Number of sinks covered: 120.
7171[INFO CTS-0201] 225 blockages from hard placement blockages and placed macros will be used.
7272[INFO CTS-0027] Generating H-Tree topology for net clk_regs.
115115 Sinks per sub-region: 2
116116 Sub-region size: 58.9286 X 41.7500
117117[INFO CTS-0034] Segment length (rounded): 20.
118- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (49 ) and max number of sinks is 15.
118+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
119119[INFO CTS-0035] Number of sinks covered: 136.
120120[INFO CTS-0018] Created 453 clock buffers.
121121[INFO CTS-0012] Minimum number of buffers in the clock path: 21.
Original file line number Diff line number Diff line change @@ -396,7 +396,7 @@ TritonCTS forced slew degradation on these wires.
396396[DEBUG CTS-tech char] Key: 14 inSlew: 1 inCap: 1 outSlew: 2 load: 1 length: 8 wl2fistyBuf: 8 lastWL: 8 delay: 0
397397[DEBUG CTS-tech char] curr wl = 12
398398[DEBUG CTS-tech char] Key: 0 inSlew: 1 inCap: 1 outSlew: 2 load: 1 length: 4 wl2fistyBuf: 4 lastWL: 4 delay: 0
399- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (23 ) and max number of sinks is 15.
399+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
400400[INFO CTS-0035] Number of sinks covered: 120.
401401[INFO CTS-0201] 225 blockages from hard placement blockages and placed macros will be used.
402402[INFO CTS-0027] Generating H-Tree topology for net clk_regs.
@@ -623,7 +623,7 @@ TritonCTS forced slew degradation on these wires.
623623[DEBUG CTS-tech char] Key: 14 inSlew: 1 inCap: 1 outSlew: 2 load: 1 length: 8 wl2fistyBuf: 8 lastWL: 8 delay: 0
624624[DEBUG CTS-tech char] curr wl = 12
625625[DEBUG CTS-tech char] Key: 0 inSlew: 1 inCap: 1 outSlew: 2 load: 1 length: 4 wl2fistyBuf: 4 lastWL: 4 delay: 0
626- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (23 ) and max number of sinks is 15.
626+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
627627[INFO CTS-0035] Number of sinks covered: 136.
628628[INFO CTS-0018] Created 641 clock buffers.
629629[INFO CTS-0012] Minimum number of buffers in the clock path: 37.
Original file line number Diff line number Diff line change 6565 Sinks per sub-region: 1
6666 Sub-region size: 41.2500 X 79.5523
6767[INFO CTS-0034] Segment length (rounded): 20.
68- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (49 ) and max number of sinks is 15.
68+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
6969[INFO CTS-0035] Number of sinks covered: 120.
7070[INFO CTS-0201] 225 blockages from hard placement blockages and placed macros will be used.
7171[INFO CTS-0027] Generating H-Tree topology for net clk_regs.
114114 Sinks per sub-region: 2
115115 Sub-region size: 58.9286 X 41.7500
116116[INFO CTS-0034] Segment length (rounded): 20.
117- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (49 ) and max number of sinks is 15.
117+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
118118[INFO CTS-0035] Number of sinks covered: 136.
119119[INFO CTS-0018] Created 453 clock buffers.
120120[INFO CTS-0012] Minimum number of buffers in the clock path: 21.
Original file line number Diff line number Diff line change 6666 Sinks per sub-region: 1
6767 Sub-region size: 41.2500 X 79.5345
6868[INFO CTS-0034] Segment length (rounded): 20.
69- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (49 ) and max number of sinks is 15.
69+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
7070[INFO CTS-0035] Number of sinks covered: 120.
7171[INFO CTS-0201] 225 blockages from hard placement blockages and placed macros will be used.
7272[INFO CTS-0027] Generating H-Tree topology for net clk_regs.
115115 Sinks per sub-region: 2
116116 Sub-region size: 58.9286 X 41.7500
117117[INFO CTS-0034] Segment length (rounded): 20.
118- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (49 ) and max number of sinks is 15.
118+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
119119[INFO CTS-0035] Number of sinks covered: 136.
120120[INFO CTS-0018] Created 453 clock buffers.
121121[INFO CTS-0012] Minimum number of buffers in the clock path: 21.
Original file line number Diff line number Diff line change 2929 Sinks per sub-region: 5
3030 Sub-region size: 0.5471 X 0.5998
3131[INFO CTS-0034] Segment length (rounded): 1.
32- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (34 ) and max number of sinks is 15.
32+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 15.
3333[INFO CTS-0035] Number of sinks covered: 9.
3434[INFO CTS-0018] Created 3 clock buffers.
3535[INFO CTS-0012] Minimum number of buffers in the clock path: 2.
Original file line number Diff line number Diff line change 4949 Sinks per sub-region: 6
5050 Sub-region size: 1.3194 X 2.3300
5151[INFO CTS-0034] Segment length (rounded): 1.
52- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (805 ) and max number of sinks is 8.
52+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (16118.364 um ) and max number of sinks is 8.
5353[INFO CTS-0035] Number of sinks covered: 170.
5454[INFO CTS-0018] Created 37 clock buffers.
5555[INFO CTS-0012] Minimum number of buffers in the clock path: 3.
Original file line number Diff line number Diff line change 4040 Sinks per sub-region: 5
4141 Sub-region size: 3.1375 X 5.5019
4242[INFO CTS-0034] Segment length (rounded): 1.
43- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (34 ) and max number of sinks is 8.
43+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (692.813 um ) and max number of sinks is 8.
4444[INFO CTS-0035] Number of sinks covered: 36.
4545[INFO CTS-0018] Created 45 clock buffers.
4646[INFO CTS-0012] Minimum number of buffers in the clock path: 3.
Original file line number Diff line number Diff line change 4141 Sinks per sub-region: 7
4242 Sub-region size: 2.3025 X 4.5071
4343[INFO CTS-0034] Segment length (rounded): 1.
44- [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (805 ) and max number of sinks is 8.
44+ [INFO CTS-0038] Stop criterion found. Sink region hpwl is smaller than max wirelength (16118.364 um ) and max number of sinks is 8.
4545[INFO CTS-0035] Number of sinks covered: 50.
4646[INFO CTS-0018] Created 59 clock buffers.
4747[INFO CTS-0012] Minimum number of buffers in the clock path: 3.
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