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| 1 | +# Regression for issue #10490: a macro PDN grid must not cause pad direct |
| 2 | +# connections to extend into the core. |
| 3 | +# |
| 4 | +# When pad direct-connect is enabled at the grid level |
| 5 | +# (define_pdn_grid -connect_to_pads), a pad connection snaps to the closest |
| 6 | +# STRIPE/RING target on a connectable layer. If a macro (instance) PDN grid is |
| 7 | +# built first, its in-core stripes become visible target candidates and -- when |
| 8 | +# there is no core target on the pad-connect layer near the pad -- the pad |
| 9 | +# connection used to snap to those macro stripes, dragging the connection deep |
| 10 | +# into the core. |
| 11 | +# |
| 12 | +# The fix makes PadDirectConnectionStraps::isTargetShape() reject shapes owned |
| 13 | +# by an instance grid, so pad connections only land on core/existing grid |
| 14 | +# shapes. This test asserts that no pad connection extends past the core |
| 15 | +# boundary. |
| 16 | +source "helpers.tcl" |
| 17 | + |
| 18 | +read_lef Nangate45/Nangate45.lef |
| 19 | +read_lef nangate_bsg_black_parrot/dummy_pads.lef |
| 20 | +read_lef Nangate45/fakeram45_64x32.lef |
| 21 | + |
| 22 | +read_def nangate_bsg_black_parrot/floorplan.def |
| 23 | + |
| 24 | +set block [ord::get_db_block] |
| 25 | +set db [ord::get_db] |
| 26 | + |
| 27 | +# Place an SRAM macro just inside the core, above the south VDD/VSS pads. |
| 28 | +set master [$db findMaster fakeram45_64x32] |
| 29 | +set inst [odb::dbInst_create $block $master "repro_sram"] |
| 30 | +$inst setOrigin 850000 450000 |
| 31 | +$inst setPlacementStatus FIRM |
| 32 | +foreach iterm [$inst getITerms] { |
| 33 | + set name [[$iterm getMTerm] getName] |
| 34 | + if { [string match "*VDD*" $name] } { |
| 35 | + odb::dbITerm_connect $iterm [$block findNet VDD] |
| 36 | + } elseif { [string match "*VSS*" $name] } { |
| 37 | + odb::dbITerm_connect $iterm [$block findNet VSS] |
| 38 | + } |
| 39 | +} |
| 40 | + |
| 41 | +add_global_connection -net VDD -pin_pattern {^VDD$} -power |
| 42 | +add_global_connection -net VDD -pin_pattern {^VDDPE$} |
| 43 | +add_global_connection -net VDD -pin_pattern {^VDDCE$} |
| 44 | +add_global_connection -net VSS -pin_pattern {^VSS$} -ground |
| 45 | +add_global_connection -net VSS -pin_pattern {^VSSE$} |
| 46 | + |
| 47 | +set_voltage_domain -power VDD -ground VSS |
| 48 | + |
| 49 | +# Define the macro grid first so it is built before the Core grid; its in-core |
| 50 | +# metal8 stripes are then visible as candidate targets when the Core grid's pad |
| 51 | +# direct-connections are created. |
| 52 | +define_pdn_grid -macro -name "sram" -instances "repro_sram" |
| 53 | +add_pdn_stripe -layer metal8 -width 1.40 -pitch 6.0 -offset 0.5 |
| 54 | +add_pdn_stripe -layer metal9 -width 1.40 -pitch 6.0 -offset 0.5 |
| 55 | +add_pdn_connect -layers {metal8 metal9} |
| 56 | + |
| 57 | +# Core grid with grid-level pad connect. The ring is on metal9/metal10 only, |
| 58 | +# so the pad metal8 connection has no metal8 ring near the pads. |
| 59 | +define_pdn_grid -name "Core" -starts_with "POWER" -connect_to_pads |
| 60 | +add_pdn_ring -grid "Core" -layers {metal9 metal10} -widths 5.0 \ |
| 61 | + -spacings 2.0 -core_offsets 2 |
| 62 | + |
| 63 | +add_pdn_stripe -layer metal4 -width 0.48 -pitch 56.0 -offset 2.24 |
| 64 | +add_pdn_stripe -layer metal7 -width 1.40 -pitch 40.0 -offset 2.70 |
| 65 | +add_pdn_stripe -layer metal8 -width 1.40 -pitch 200.0 -offset 100.0 |
| 66 | +add_pdn_stripe -layer metal9 -width 1.40 -pitch 40.0 -offset 2.70 |
| 67 | + |
| 68 | +add_pdn_connect -layers {metal4 metal7} |
| 69 | +add_pdn_connect -layers {metal7 metal8} |
| 70 | +add_pdn_connect -layers {metal8 metal9} |
| 71 | +add_pdn_connect -layers {metal9 metal10} |
| 72 | + |
| 73 | +pdngen |
| 74 | + |
| 75 | +set core [$block getCoreArea] |
| 76 | +set core_ymin [$core yMin] |
| 77 | + |
| 78 | +# A genuine south pad connection is a narrow vertical metal8 shape rooted in the |
| 79 | +# pad (ymin within the pad y-extent). Assert that none extends into the core. |
| 80 | +set pad_top 352000 |
| 81 | +set bad 0 |
| 82 | +foreach net {VDD VSS} { |
| 83 | + set dnet [$block findNet $net] |
| 84 | + foreach swire [$dnet getSWires] { |
| 85 | + foreach wire [$swire getWires] { |
| 86 | + if { [$wire isVia] } { continue } |
| 87 | + if { [[$wire getTechLayer] getName] != "metal8" } { continue } |
| 88 | + set xmin [$wire xMin]; set ymin [$wire yMin] |
| 89 | + set xmax [$wire xMax]; set ymax [$wire yMax] |
| 90 | + set dx [expr {$xmax - $xmin}]; set dy [expr {$ymax - $ymin}] |
| 91 | + if { $dx < 5000 && $dy > $dx && $ymin <= $pad_top && $ymax > $core_ymin } { |
| 92 | + incr bad |
| 93 | + } |
| 94 | + } |
| 95 | + } |
| 96 | +} |
| 97 | + |
| 98 | +puts "pad connections extending into core: $bad" |
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