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Merge pull request #10727 from Fermions-ASI/fix/6704
dpl: make legalPt() Y-clamp origin-independent + add centered_floorplan test (#6704)
2 parents ab7bb14 + 598a797 commit 995b782

7 files changed

Lines changed: 81 additions & 2 deletions

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‎src/dpl/src/Place.cpp‎

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@@ -1150,9 +1150,8 @@ DbuPt Opendp::legalPt(const Node* cell, const DbuPt& pt) const
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// Align with row site.
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const GridX grid_x{divRound(core_x.v, site_width.v)};
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const DbuX legal_x{gridToDbu(grid_x, site_width)};
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// Align to row
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const DbuY core_y
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= std::clamp(pt.y, DbuY{0}, DbuY{core_.yMax()} - cell->getHeight());
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= std::clamp(pt.y, DbuY{0}, DbuY{core_.dy()} - cell->getHeight());
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const GridY grid_y = grid_->gridRoundY(core_y);
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DbuY legal_y = grid_->gridYToDbu(grid_y);
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‎src/dpl/test/BUILD‎

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@@ -13,6 +13,7 @@ COMPULSORY_TESTS = [
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"blockage01",
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"cell_on_block1",
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"cell_on_block2",
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"centered_floorplan",
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"check1",
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"check2",
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"check3",

‎src/dpl/test/CMakeLists.txt‎

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@@ -8,6 +8,7 @@ or_integration_tests(
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blockage01
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cell_on_block1
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cell_on_block2
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centered_floorplan
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check1
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check2
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check3

‎src/dpl/test/centered_floorplan.def‎

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VERSION 5.8 ;
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DIVIDERCHAR "/" ;
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BUSBITCHARS "[]" ;
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DESIGN centered_dpl ;
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UNITS DISTANCE MICRONS 2000 ;
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DIEAREA ( 76000 140000 ) ( 91200 151200 ) ;
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ROW ROW_0 FreePDK45_38x28_10R_NP_162NW_34O 76000 140000 FS DO 40 BY 1 STEP 380 0 ;
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ROW ROW_1 FreePDK45_38x28_10R_NP_162NW_34O 76000 142800 N DO 40 BY 1 STEP 380 0 ;
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ROW ROW_2 FreePDK45_38x28_10R_NP_162NW_34O 76000 145600 FS DO 40 BY 1 STEP 380 0 ;
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ROW ROW_3 FreePDK45_38x28_10R_NP_162NW_34O 76000 148400 N DO 40 BY 1 STEP 380 0 ;
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COMPONENTS 6 ;
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- u0 BUF_X1 + PLACED ( 76000 140000 ) N ;
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- u1 BUF_X1 + PLACED ( 76380 140000 ) N ;
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- u2 BUF_X1 + PLACED ( 76760 140000 ) N ;
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- u3 INV_X1 + PLACED ( 77140 140000 ) N ;
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- u4 INV_X1 + PLACED ( 77520 140000 ) N ;
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- u5 BUF_X1 + PLACED ( 77900 140000 ) N ;
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END COMPONENTS
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END DESIGN

‎src/dpl/test/centered_floorplan.defok‎

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VERSION 5.8 ;
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DIVIDERCHAR "/" ;
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BUSBITCHARS "[]" ;
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DESIGN centered_dpl ;
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UNITS DISTANCE MICRONS 2000 ;
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DIEAREA ( 76000 140000 ) ( 91200 151200 ) ;
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ROW ROW_0 FreePDK45_38x28_10R_NP_162NW_34O 76000 140000 FS DO 40 BY 1 STEP 380 0 ;
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ROW ROW_1 FreePDK45_38x28_10R_NP_162NW_34O 76000 142800 N DO 40 BY 1 STEP 380 0 ;
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ROW ROW_2 FreePDK45_38x28_10R_NP_162NW_34O 76000 145600 FS DO 40 BY 1 STEP 380 0 ;
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ROW ROW_3 FreePDK45_38x28_10R_NP_162NW_34O 76000 148400 N DO 40 BY 1 STEP 380 0 ;
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COMPONENTS 6 ;
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- u0 BUF_X1 + PLACED ( 76000 142800 ) N ;
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- u1 BUF_X1 + PLACED ( 79040 140000 ) FS ;
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- u2 BUF_X1 + PLACED ( 76760 140000 ) FS ;
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- u3 INV_X1 + PLACED ( 77140 142800 ) N ;
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- u4 INV_X1 + PLACED ( 76000 140000 ) FS ;
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- u5 BUF_X1 + PLACED ( 77900 140000 ) FS ;
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END COMPONENTS
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NETS 0 ;
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END NETS
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END DESIGN

‎src/dpl/test/centered_floorplan.ok‎

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[INFO ODB-0227] LEF file: Nangate45/Nangate45.lef, created 22 layers, 27 vias, 135 library cells
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[INFO ODB-0128] Design: centered_dpl
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[INFO ODB-0131] Created 6 components and 24 component-terminals.
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[INFO DPL-0006] Core area: 42.56 um^2, Instances area: 4.26 um^2, Utilization: 10.0%
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[INFO DPL-0005] Diamond search max displacement: +/- 500 sites horizontally, +/- 100 rows vertically.
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[INFO DPL-1101] Legalizing using diamond search.
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Movements Summary
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---------------------------------------
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Total cells: 6
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Diamond Move Success: 6 (100.00%)
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Diamond Move Failure: 0
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Rip-up and replace Success: 0 ( 0.00% of diamond failures)
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Rip-up and replace Failure: 0
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Total Placement Failures: 0
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---------------------------------------
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Placement Analysis
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---------------------------------
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total displacement 4.9 u
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average displacement 0.8 u
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max displacement 1.4 u
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original HPWL 0.0 u
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legalized HPWL 0.0 u
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delta HPWL 0 %
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No differences found.

‎src/dpl/test/centered_floorplan.tcl‎

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# Centered (non-origin) floorplan: DIEAREA lower-left is not (0,0).
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# Regression guard for #6704 -- detailed_placement must legalize a centered
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# floorplan the same way it does an origin-anchored one (no exploded
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# displacement, clean check_placement).
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source "helpers.tcl"
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read_lef Nangate45/Nangate45.lef
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read_def centered_floorplan.def
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detailed_placement
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check_placement
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set def_file [make_result_file centered_floorplan.def]
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write_def $def_file
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diff_file centered_floorplan.defok $def_file

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