@@ -50,6 +50,7 @@ Using 2 tracks default min distance between IO pins.
5050[InitialPlace] Iter: 3 conjugate gradient residual: 0.00000012 HPWL: 1229790
5151[InitialPlace] Iter: 4 conjugate gradient residual: 0.00000012 HPWL: 1229790
5252[InitialPlace] Iter: 5 conjugate gradient residual: 0.00000012 HPWL: 1229790
53+ [WARNING DPL-0404] Macro inst_0 is placed but not fixed; treating it as fixed. Mark it FIXED to silence this warning.
5354[INFO DPL-0006] Core area: 47872.02 um^2, Instances area: 1357.12 um^2, Utilization: 2.8%
5455[INFO DPL-0005] Diamond search max displacement: +/- 500 sites horizontally, +/- 100 rows vertically.
5556[INFO DPL-1101] Legalizing using diamond search.
@@ -64,11 +65,11 @@ Total Placement Failures: 0
6465---------------------------------------
6566Placement Analysis
6667---------------------------------
67- total displacement 9387 .3 u
68- average displacement 33.6 u
69- max displacement 51.8 u
68+ total displacement 10261 .3 u
69+ average displacement 36.8 u
70+ max displacement 56.4 u
7071original HPWL 605.0 u
71- legalized HPWL 641.4 u
72+ legalized HPWL 640.2 u
7273delta HPWL 6 %
7374
7475[INFO CTS-0050] Root buffer is CLKBUF_X3.
@@ -109,13 +110,13 @@ delta HPWL 6 %
109110[INFO CTS-0204] A clustering solution was found from clustering size of 10 and clustering diameter of 60.
110111[INFO CTS-0205] Better solution may be possible if either -sink_clustering_size, -sink_clustering_max_diameter, or both options are omitted to enable automatic clustering.
111112[INFO CTS-0019] Total number of sinks after clustering: 28.
112- [INFO CTS-0024] Normalized sink region: [(0.369143 , 0.371964 ), (5.02957 , 6.24 )].
113- [INFO CTS-0025] Width: 4.6604 .
114- [INFO CTS-0026] Height: 5.8680 .
113+ [INFO CTS-0024] Normalized sink region: [(0.806143 , 0.417571 ), (4.959 , 6.37757 )].
114+ [INFO CTS-0025] Width: 4.1529 .
115+ [INFO CTS-0026] Height: 5.9600 .
115116 Level 1
116117 Direction: Vertical
117118 Sinks per sub-region: 14
118- Sub-region size: 4.6604 X 2.9340
119+ Sub-region size: 4.1529 X 2.9800
119120[INFO CTS-0034] Segment length (rounded): 1.
120121[INFO CTS-0032] Stop criterion found. Max number of sinks is 15.
121122[INFO CTS-0035] Number of sinks covered: 28.
@@ -136,7 +137,7 @@ delta HPWL 6 %
136137[INFO CTS-0098] Clock net "clk_regs"
137138[INFO CTS-0099] Sinks 280
138139[INFO CTS-0100] Leaf buffers 28
139- [INFO CTS-0101] Average sink wire length 31.00 um
140+ [INFO CTS-0101] Average sink wire length 27.32 um
140141[INFO CTS-0102] Path depth 2 - 3
141142[INFO CTS-0207] Dummy loads inserted 2
142143[INFO CTS-0033] Balancing latency for clock core
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