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gpl: preserve user clock latency in virtual CTS
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
1 parent 12ca866 commit ce5b0c5

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‎src/gpl/src/clockBase.cpp‎

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@@ -229,6 +229,10 @@ void ClockBase::buildVirtualTreeForClock(const sta::Clock* clk)
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sta::Sdc* sdc = sta_->cmdSdc();
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for (int i = 0; i < n; ++i) {
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// Preserve user-specified clock latency; do not overwrite or delete it.
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if (hasUserClockLatency(clk, sinks[i].pin)) {
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continue;
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}
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const float delay = static_cast<float>(tree_dist[i] * scale);
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// Use setClockLatency (network latency) rather than setClockInsertion
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// (source latency). During global placement the clock is ideal
@@ -299,4 +303,22 @@ bool ClockBase::getPinLocation(const sta::Pin* pin, int& x, int& y) const
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return false;
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}
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bool ClockBase::hasUserClockLatency(const sta::Clock* clk,
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const sta::Pin* pin) const
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{
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sta::Sdc* sdc = sta_->cmdSdc();
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for (const sta::RiseFall* rf :
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{sta::RiseFall::rise(), sta::RiseFall::fall()}) {
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for (const sta::MinMax* mm : {sta::MinMax::min(), sta::MinMax::max()}) {
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float latency = 0.0f;
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bool exists = false;
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sdc->clockLatency(clk, pin, rf, mm, latency, exists);
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if (exists) {
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return true;
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}
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}
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}
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return false;
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}
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} // namespace gpl

‎src/gpl/src/clockBase.h‎

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@@ -69,6 +69,9 @@ class ClockBase
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// Get the instance origin (in DBU) for a given STA pin.
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// Returns false if the pin has no placement location.
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bool getPinLocation(const sta::Pin* pin, int& x, int& y) const;
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// True if the user already set a clock latency on this clk/pin.
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bool hasUserClockLatency(const sta::Clock* clk, const sta::Pin* pin) const;
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};
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} // namespace gpl

‎src/gpl/test/BUILD‎

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@@ -33,6 +33,7 @@ TESTS = [
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"simple01-vcts",
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"simple01-vcts-clamp",
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"simple01-vcts-noclk",
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"simple01-vcts-userlat",
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"simple02",
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"simple02-rd",
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"simple03",

‎src/gpl/test/CMakeLists.txt‎

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@@ -29,6 +29,7 @@ or_integration_tests(
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simple01-vcts
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simple01-vcts-clamp
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simple01-vcts-noclk
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simple01-vcts-userlat
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simple02
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simple02-rd
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simple03

‎src/gpl/test/simple01-vcts-userlat.ok‎

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[INFO ODB-0227] LEF file: ./nangate45.lef, created 22 layers, 27 vias, 134 library cells
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[INFO ODB-0128] Design: gcd
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[INFO ODB-0130] Created 54 pins.
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[INFO ODB-0131] Created 286 components and 1624 component-terminals.
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[INFO ODB-0133] Created 356 nets and 1052 connections.
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[INFO GPL-0001] ---- Initialize GPL Main Data Structures
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[INFO GPL-0002] DBU: 2000
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[INFO GPL-0003] SiteSize: ( 0.190 1.400 ) um
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[INFO GPL-0004] CoreBBox: ( 0.000 0.000 ) ( 30.970 30.800 ) um
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[INFO GPL-0036] Movable instances area: 553.280 um^2
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[INFO GPL-0037] Total instances area: 553.280 um^2
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[INFO GPL-0035] Pin density area adjust: 47.712 um^2
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[INFO GPL-0032] ---- Initialize Region: Top-level
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[INFO GPL-0006] Number of instances: 286
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[INFO GPL-0007] Movable instances: 286
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[INFO GPL-0008] Fixed instances: 0
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[INFO GPL-0009] Dummy instances: 0
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[INFO GPL-0010] Number of nets: 356
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[INFO GPL-0011] Number of pins: 1106
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[INFO GPL-0012] Die BBox: ( 0.000 0.000 ) ( 30.970 30.800 ) um
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[INFO GPL-0013] Core BBox: ( 0.000 0.000 ) ( 30.970 30.800 ) um
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[INFO GPL-0016] Core area: 953.876 um^2
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[INFO GPL-0014] Region name: top-level.
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[INFO GPL-0015] Region area: 953.876 um^2
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[INFO GPL-0017] Fixed instances area: 0.000 um^2
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[INFO GPL-0018] Movable instances area: 600.992 um^2
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[INFO GPL-0019] Utilization: 63.005 %
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[INFO GPL-0020] Standard cells area: 600.992 um^2
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[INFO GPL-0021] Large instances area: 0.000 um^2
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[INFO GPL-0005] ---- Execute Conjugate Gradient Initial Placement.
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[INFO GPL-0051] Source of initial instance position counters:
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Odb location = 0 Core center = 286 Region center = 0
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[InitialPlace] Iter: 1 conjugate gradient residual: 0.00000011 HPWL: 5614340
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[InitialPlace] Iter: 2 conjugate gradient residual: 0.00000011 HPWL: 4998803
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[InitialPlace] Iter: 3 conjugate gradient residual: 0.00000010 HPWL: 4991131
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[InitialPlace] Iter: 4 conjugate gradient residual: 0.00000010 HPWL: 4997865
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[InitialPlace] Iter: 5 conjugate gradient residual: 0.00000009 HPWL: 5002847
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[INFO GPL-0033] ---- Initialize Nesterov Region: Top-level
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[INFO GPL-0023] Placement target density: 0.7000
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[INFO GPL-0024] Movable insts average area: 2.101 um^2
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[INFO GPL-0025] Ideal bin area: 3.002 um^2
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[INFO GPL-0026] Ideal bin count: 317
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[INFO GPL-0027] Total bin area: 953.876 um^2
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[INFO GPL-0028] Bin count (X, Y): 16 , 16
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[INFO GPL-0029] Bin size (W * H): 1.936 * 1.925 um
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[INFO GPL-0030] Number of bins: 256
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[INFO GPL-0084] ---- Execute Nesterov Global Placement.
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[INFO GPL-0031] HPWL: Half-Perimeter Wirelength
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Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group
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---------------------------------------------------------------
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0 | 0.8415 | 1.823749e+03 | +0.00% | 6.86e-14 |
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10 | 0.7168 | 2.047757e+03 | +12.28% | 1.12e-13 |
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20 | 0.7223 | 2.039114e+03 | -0.42% | 1.82e-13 |
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30 | 0.7242 | 2.039052e+03 | -0.00% | 2.96e-13 |
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40 | 0.7231 | 2.039403e+03 | +0.02% | 4.83e-13 |
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50 | 0.7231 | 2.039349e+03 | -0.00% | 7.86e-13 |
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60 | 0.7231 | 2.039443e+03 | +0.00% | 1.28e-12 |
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70 | 0.7232 | 2.039536e+03 | +0.00% | 2.09e-12 |
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80 | 0.7229 | 2.039703e+03 | +0.01% | 3.40e-12 |
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90 | 0.7226 | 2.040133e+03 | +0.02% | 5.54e-12 |
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100 | 0.7222 | 2.040652e+03 | +0.03% | 9.02e-12 |
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110 | 0.7216 | 2.041562e+03 | +0.04% | 1.47e-11 |
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120 | 0.7205 | 2.042977e+03 | +0.07% | 2.39e-11 |
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130 | 0.7187 | 2.045267e+03 | +0.11% | 3.90e-11 |
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140 | 0.7159 | 2.048748e+03 | +0.17% | 6.35e-11 |
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150 | 0.7115 | 2.054013e+03 | +0.26% | 1.03e-10 |
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160 | 0.7043 | 2.062230e+03 | +0.40% | 1.68e-10 |
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170 | 0.6948 | 2.073365e+03 | +0.54% | 2.74e-10 |
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180 | 0.6842 | 2.089633e+03 | +0.78% | 4.47e-10 |
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190 | 0.6686 | 2.111814e+03 | +1.06% | 7.28e-10 |
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200 | 0.6478 | 2.138892e+03 | +1.28% | 1.19e-09 |
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[INFO GPL-0162] Virtual CTS: set 33 virtual clock insertion delays.
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[INFO GPL-0164] Virtual CTS iteration 1, overflow: 0.634.
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[INFO GPL-0100] Timing-driven iteration 1/2, virtual: false.
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[INFO GPL-0101] Iter: 206, overflow: 0.634, keep resizer changes at: 1, HPWL: 4312728
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Iteration | Area | Resized | Buffers | Nets repaired | Remaining
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---------------------------------------------------------------------
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0 | +0.0% | 0 | 0 | 0 | 356
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final | +0.0% | 0 | 0 | 0 | 0
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---------------------------------------------------------------------
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Iter | Area | Removed | Inserted | Pins
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| | Buffers | Buffers | Remaining
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-------------------------------------------------------
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0 | +0.0% | 0 | 0 | 320
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32 | +0.0% | 0 | 0 | 288
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64 | +0.0% | 0 | 0 | 256
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96 | +0.0% | 0 | 0 | 224
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128 | +0.0% | 0 | 0 | 192
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160 | +0.0% | 0 | 0 | 160
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192 | +0.0% | 0 | 0 | 128
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224 | +0.0% | 0 | 0 | 96
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256 | +0.0% | 0 | 0 | 64
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288 | +0.2% | 0 | 1 | 32
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final | +0.9% | 0 | 5 | 0
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-------------------------------------------------------
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[INFO GPL-0106] Timing-driven: worst slack 1.0516223e-09
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[INFO GPL-0107] Timing-driven: repair_design delta area: 5.054 um^2 (+0.84%)
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[INFO GPL-0108] Timing-driven: repair_design, gpl delta gcells: 5 (+1.75%)
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[INFO GPL-0109] Timing-driven: repair_design, gcells created: 5, deleted: 0
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[INFO GPL-0110] Timing-driven: new target density: 0.70529836
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Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group
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---------------------------------------------------------------
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210 | 0.7002 | 2.200066e+03 | +2.86% | 1.93e-09 |
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220 | 0.6337 | 2.251557e+03 | +2.34% | 3.15e-09 |
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230 | 0.5973 | 2.271468e+03 | +0.88% | 5.13e-09 |
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240 | 0.5463 | 2.339269e+03 | +2.98% | 8.35e-09 |
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250 | 0.4911 | 2.367852e+03 | +1.22% | 1.36e-08 |
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260 | 0.4318 | 2.407081e+03 | +1.66% | 2.22e-08 |
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270 | 0.3718 | 2.428369e+03 | +0.88% | 3.61e-08 |
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280 | 0.3194 | 2.442180e+03 | +0.57% | 5.59e-08 |
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290 | 0.2751 | 2.451771e+03 | +0.39% | 8.23e-08 |
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300 | 0.2390 | 2.478613e+03 | +1.09% | 1.21e-07 |
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310 | 0.2142 | 2.507873e+03 | +1.18% | 1.79e-07 |
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[INFO GPL-0162] Virtual CTS: set 33 virtual clock insertion delays.
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[INFO GPL-0164] Virtual CTS iteration 2, overflow: 0.194.
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[INFO GPL-0100] Timing-driven iteration 2/2, virtual: false.
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[INFO GPL-0101] Iter: 320, overflow: 0.194, keep resizer changes at: 1, HPWL: 5057951
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Iteration | Area | Resized | Buffers | Nets repaired | Remaining
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---------------------------------------------------------------------
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0 | +0.0% | 0 | 0 | 0 | 361
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final | +0.0% | 0 | 0 | 0 | 0
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---------------------------------------------------------------------
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Iter | Area | Removed | Inserted | Pins
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| | Buffers | Buffers | Remaining
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-------------------------------------------------------
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0 | +0.0% | 0 | 0 | 320
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32 | +0.0% | 0 | 0 | 288
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64 | +0.0% | 0 | 0 | 256
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96 | +0.0% | 0 | 0 | 224
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128 | +0.0% | 0 | 0 | 192
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160 | +0.0% | 0 | 0 | 160
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192 | +0.0% | 0 | 0 | 128
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224 | +0.0% | 0 | 0 | 96
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256 | +0.1% | 0 | 1 | 64
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288 | +0.1% | 1 | 2 | 32
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final | +0.1% | 5 | 6 | 0
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-------------------------------------------------------
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[INFO GPL-0106] Timing-driven: worst slack 1.0292465e-09
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[INFO GPL-0107] Timing-driven: repair_design delta area: 0.798 um^2 (+0.13%)
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[INFO GPL-0108] Timing-driven: repair_design, gpl delta gcells: 1 (+0.34%)
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[INFO GPL-0109] Timing-driven: repair_design, gcells created: 6, deleted: 5
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[INFO GPL-0110] Timing-driven: new target density: 0.706135
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Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group
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---------------------------------------------------------------
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320 | 0.1926 | 2.568155e+03 | +2.40% | 2.63e-07 |
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330 | 0.1731 | 2.574847e+03 | +0.26% | 3.88e-07 |
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340 | 0.1410 | 2.584419e+03 | +0.37% | 5.71e-07 |
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350 | 0.1286 | 2.604276e+03 | +0.77% | 8.41e-07 |
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360 | 0.1037 | 2.617003e+03 | +0.49% | 1.24e-06 |
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362 | 0.0986 | 2.619848e+03 | | 1.39e-06 |
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---------------------------------------------------------------
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[INFO GPL-1001] Global placement finished at iteration 362
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[INFO GPL-1002] Placed Cell Area 606.8444
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[INFO GPL-1003] Available Free Area 953.8760
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[INFO GPL-1004] Minimum Feasible Density 0.6400 (cell_area / free_area)
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[INFO GPL-1006] Suggested Target Densities:
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[INFO GPL-1007] - For 90% usage of free space: 0.7069
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[INFO GPL-1008] - For 80% usage of free space: 0.7952
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[INFO GPL-1011] Original area (um^2): 600.99
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[INFO GPL-1013] Total timing-driven delta area: 5.85 (+0.97%)
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[INFO GPL-1014] Final placement area: 606.84 (+0.97%)
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worst slack max 1.02

‎src/gpl/test/simple01-vcts-userlat.tcl‎

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source helpers.tcl
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read_liberty ./library/nangate45/NangateOpenCellLibrary_typical.lib
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read_lef ./nangate45.lef
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read_def ./simple01-td.def
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create_clock -name core_clock -period 2 clk
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set_wire_rc -signal -layer metal3
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set_wire_rc -clock -layer metal5
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# Regression for virtual CTS clobbering user clock-latency constraints.
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#
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# Virtual CTS temporarily sets a per-pin network latency on every register
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# clock sink, then removes it before final timing. The removal deletes the
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# entry entirely (STA has no restore), so if virtual CTS were allowed to
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# write over a pin the user already constrained with set_clock_latency, that
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# user constraint would be silently deleted when virtual CTS cleans up.
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#
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# Here we constrain exactly one of the 34 register clock pins. virtual CTS
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# must leave that pin alone and only annotate the other 33. The check is the
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# GPL-0162 count: it reports "set 33 ..." (not 34). A regression that resumes
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# overwriting user-constrained pins would report 34 and delete the user's
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# 0.5ns latency on _569_/CK.
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set_clock_latency 0.5 [get_pins _569_/CK]
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global_placement -timing_driven -virtual_cts
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estimate_parasitics -placement
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report_worst_slack

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