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Expand file tree Collapse file tree Original file line number Diff line number Diff line change @@ -15,6 +15,9 @@ The `set_wire_rc` command sets the resistance and capacitance used to estimate
1515delay of routing wires. Separate values can be specified for clock and data
1616nets with the ` -signal ` and ` -clock ` flags. Without either ` -signal ` or
1717` -clock ` the resistance and capacitance for clocks and data nets are set.
18+ In 3D designs the values can be targeted at specific chips with the ` -tech ` ,
19+ ` -chip ` and ` -redistribution_layer ` selectors; without a selector the values
20+ are the defaults used by chips that have no chip-specific values.
1821
1922```
2023# Either run
@@ -31,13 +34,19 @@ set_wire_rc
3134 [-data]
3235 [-corner corner]
3336 [-layers layers_list]
37+ [-tech tech]
38+ [-chip chip]
39+ [-redistribution_layer]
3440
3541or
3642set_wire_rc
3743 [-h_resistance res]
3844 [-h_capacitance cap]
3945 [-v_resistance res]
4046 [-v_capacitance cap]
47+ [-tech tech]
48+ [-chip chip]
49+ [-redistribution_layer]
4150
4251or
4352set_wire_rc
@@ -46,10 +55,16 @@ set_wire_rc
4655 [-data]
4756 [-corner corner]
4857 [-layer layer_name]
58+ [-tech tech]
59+ [-chip chip]
60+ [-redistribution_layer]
4961or
5062set_wire_rc
5163 [-resistance res]
5264 [-capacitance cap]
65+ [-tech tech]
66+ [-chip chip]
67+ [-redistribution_layer]
5368```
5469
5570#### Options
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