update sta and add new regression to catch read_def with funny DEFs

src/dbSta/test/CMakeLists.txt

@@ -19,6 +19,7 @@ or_integration_tests(
     make_port
     network_edit1
     power1
+    read_def_bus_port
     read_liberty1
     read_vcd
     read_verilog1

src/dbSta/test/read_def_bus_port.def

@@ -0,0 +1,32 @@
+VERSION 5.8 ;
+DIVIDERCHAR "/" ;
+BUSBITCHARS "[]" ;
+DESIGN test_bus_port ;
+UNITS DISTANCE MICRONS 1000 ;
+DIEAREA ( 0 0 ) ( 100000 100000 ) ;
+
+PINS 9 ;
+    - kv_write[3][write_en] + NET kv_write\[3\]\[write_en\] + DIRECTION INPUT + USE SIGNAL ;
+    - kv_write[3][write_entry][4] + NET kv_write\[3\]\[write_entry\]\[4\] + DIRECTION INPUT + USE SIGNAL ;
+    - kv_write[3][write_entry][3] + NET kv_write\[3\]\[write_entry\]\[3\] + DIRECTION INPUT + USE SIGNAL ;
+    - kv_write[3][write_entry][2] + NET kv_write\[3\]\[write_entry\]\[2\] + DIRECTION INPUT + USE SIGNAL ;
+    - kv_write[3][write_entry][1] + NET kv_write\[3\]\[write_entry\]\[1\] + DIRECTION INPUT + USE SIGNAL ;
+    - kv_write[3][write_entry][0] + NET kv_write\[3\]\[write_entry\]\[0\] + DIRECTION INPUT + USE SIGNAL ;
+    - kv_write[3][write_offset][3] + NET kv_write\[3\]\[write_offset\]\[3\] + DIRECTION INPUT + USE SIGNAL ;
+    - kv_write[3][write_offset][2] + NET kv_write\[3\]\[write_offset\]\[2\] + DIRECTION INPUT + USE SIGNAL ;
+    - clk + NET clk + DIRECTION INPUT + USE CLOCK ;
+END PINS
+
+NETS 9 ;
+    - kv_write\[3\]\[write_en\] ( PIN kv_write[3][write_en] ) ;
+    - kv_write\[3\]\[write_entry\]\[4\] ( PIN kv_write[3][write_entry][4] ) ;
+    - kv_write\[3\]\[write_entry\]\[3\] ( PIN kv_write[3][write_entry][3] ) ;
+    - kv_write\[3\]\[write_entry\]\[2\] ( PIN kv_write[3][write_entry][2] ) ;
+    - kv_write\[3\]\[write_entry\]\[1\] ( PIN kv_write[3][write_entry][1] ) ;
+    - kv_write\[3\]\[write_entry\]\[0\] ( PIN kv_write[3][write_entry][0] ) ;
+    - kv_write\[3\]\[write_offset\]\[3\] ( PIN kv_write[3][write_offset][3] ) ;
+    - kv_write\[3\]\[write_offset\]\[2\] ( PIN kv_write[3][write_offset][2] ) ;
+    - clk ( PIN clk ) ;
+END NETS
+
+END DESIGN

src/dbSta/test/read_def_bus_port.ok

@@ -0,0 +1,10 @@
+[INFO ODB-0227] LEF file: Nangate45/Nangate45.lef, created 22 layers, 27 vias, 135 library cells
+[INFO ODB-0128] Design: test_bus_port
+[INFO ODB-0130]     Created 9 pins.
+[INFO ODB-0133]     Created 9 nets and 0 connections.
+port_count: 9
+scalar: kv_write[3][write_en]
+write_entry_count: 5
+write_offset_count: 2
+clk: clk
+pass

src/dbSta/test/read_def_bus_port.tcl

@@ -0,0 +1,28 @@
+# Test that read_def handles port names with non-numeric bus subscripts
+# like kv_write[3][write_en] without crashing (stoi in parseBusName).
+# Also verify that ports with numeric trailing subscripts are grouped
+# into buses correctly.
+source "helpers.tcl"
+
+read_lef Nangate45/Nangate45.lef
+read_def read_def_bus_port.def
+
+# Verify read_def completed (no crash on non-numeric subscripts)
+set all_ports [get_ports *]
+puts "port_count: [llength $all_ports]"
+
+# Scalar port with non-numeric subscript should exist
+puts "scalar: [get_name [get_ports {kv_write[3][write_en]}]]"
+
+# Bus ports: kv_write[3][write_entry] should be grouped (bits 0-4)
+set entry_ports [get_ports {kv_write[3][write_entry][*]}]
+puts "write_entry_count: [llength $entry_ports]"
+
+# Bus ports: kv_write[3][write_offset] should be grouped (bits 2-3)
+set offset_ports [get_ports {kv_write[3][write_offset][*]}]
+puts "write_offset_count: [llength $offset_ports]"
+
+puts "clk: [get_name [get_ports clk]]"
+
+puts "pass"
+exit 0