[gpl] Include internal power in MBFF clustering cost#10075
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@mikesinouye please test this on your internal designs. I'm seeing improvement on some of our designs. |
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Code Review
This pull request integrates clock pin internal power into the MBFF cost metric, ensuring more accurate power estimation during clustering. The changes include adding a method to calculate clock pin energy, updating the cost calculation logic, and caching clock periods. I have identified a potential division-by-zero risk in the cost normalization logic, a performance concern regarding redundant STA lookups within the SetVars loop, and a violation of the style guide regarding the use of magic numbers for clock activity calculations.
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clang-tidy review says "All clean, LGTM! 👍" |
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clang-tidy review says "All clean, LGTM! 👍" |
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@codex review |
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clang-tidy review says "All clean, LGTM! 👍" |
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clang-tidy review says "All clean, LGTM! 👍" |
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The MBFF algorithm previously used only leakage power to decide whether to replace single-bit flip-flops with multi-bit cells. For flip-flops, internal power dominates total power, and MBFF cells share scan (SE/SI) and clock structures across bits, giving 40-90% savings on those pins. Ignoring internal power caused clustering to increase total power on some PDKs. Add getInternalEnergy() which sums average internal energy across all pins (CK, D, Q, SE, SI) from Liberty internal_power tables. Use this alongside leakage in three places: - SetRatios: norm_power_ uses total estimated power (leakage + internal_energy * clock_activity) so the ILP cost function reflects total power, not just leakage. - ReadLibs: select best tray per size by minimum total estimated power instead of minimum leakage, so cells with lower total power (e.g. SVT over LVT) are preferred even when their leakage is higher. - SetVars: select the single-bit baseline cell by lowest total estimated power, with both leakage and internal energy paired from the same cell. Clock period is obtained from SDC before ReadLibs runs so tray selection can account for internal power. Falls back to leakage-only when no clock is defined or no internal_power tables exist. Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
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clang-tidy review says "All clean, LGTM! 👍" |
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Summary
The MBFF algorithm previously used only leakage power to decide whether
to replace single-bit flip-flops with multi-bit cells. For flip-flops,
internal power dominates total power, and MBFF cells share scan (SE/SI)
and clock structures across bits, giving 40-90% savings on those pins.
Ignoring internal power caused clustering to increase total power on
some PDKs.
Add getInternalEnergy() which sums average internal energy across all
pins (CK, D, Q, SE, SI) from Liberty internal_power tables. Use this
alongside leakage in three places:
internal_energy * clock_activity) so the ILP cost function reflects
total power, not just leakage.
instead of minimum leakage, so cells with lower total power (e.g. SVT
over LVT) are preferred even when their leakage is higher.
power, with both leakage and internal energy paired from the same cell.
Clock period is obtained from SDC before ReadLibs runs so tray selection
can account for internal power. Falls back to leakage-only when no
clock is defined or no internal_power tables exist.
Type of Change
Verification
./etc/Build.sh).