rsz: Prevent hold repair from buffering internal output arcs

src/rsz/src/RepairHold.cc

@@ -22,8 +22,6 @@
 #include "sta/Fuzzy.hh"
 #include "sta/Graph.hh"
 #include "sta/GraphClass.hh"
-#include "sta/GraphDelayCalc.hh"
-#include "sta/InputDrive.hh"
 #include "sta/Liberty.hh"
 #include "sta/LibertyClass.hh"
 #include "sta/MinMax.hh"
@@ -579,6 +577,13 @@ void RepairHold::repairEndHold(sta::Vertex* end_vertex,
             if (pred.searchTo(fanout, mode) && pred.searchThru(edge, mode)) {
               sta::Slack fanout_hold_slack = sta_->slack(fanout, min_);
               sta::Pin* load_pin = fanout->pin();
+              if (load_pin == nullptr) {
+                continue;
+              }
+              if (!network_->direction(load_pin)->isAnyInput()
+                  && !network_->isTopLevelPort(load_pin)) {
+                continue;
+              }
               if (fanout_hold_slack < hold_margin) {
                 load_pins.push_back(load_pin);
                 Slacks fanout_slacks;
@@ -714,13 +719,7 @@ void RepairHold::makeHoldDelay(sta::Vertex* drvr,
 
   // New insert buffer behavior
   sta::Pin* drvr_pin = drvr->pin();
-  odb::dbObject* drvr_db_pin = db_network_->staToDb(drvr_pin);
-  odb::dbNet* drvr_dbnet = nullptr;
-  if (drvr_db_pin->getObjectType() == odb::dbObjectType::dbBTermObj) {
-    drvr_dbnet = static_cast<odb::dbBTerm*>(drvr_db_pin)->getNet();
-  } else {
-    drvr_dbnet = static_cast<odb::dbITerm*>(drvr_db_pin)->getNet();
-  }
+  odb::dbNet* drvr_dbnet = db_network_->findFlatDbNet(drvr_pin);
 
   sta::Net* drvr_net = db_network_->dbToSta(drvr_dbnet);
 
@@ -734,6 +733,9 @@ void RepairHold::makeHoldDelay(sta::Vertex* drvr,
       load_pins_set.insert(const_cast<sta::Pin*>(load_pin));
     }
   }
+  if (load_pins_set.empty()) {
+    return;
+  }
 
   buffer = resizer_->insertBufferBeforeLoads(
       drvr_net, &load_pins_set, buffer_cell, &loc, "hold");

src/rsz/test/BUILD

@@ -99,6 +99,7 @@ TESTS = [
     "repair_hold8",
     "repair_hold9",
     "repair_hold9_verbose",
+    "repair_hold_multi_output_load",
     "repair_setup1",
     "repair_setup1_multi",
     "repair_setup2",

src/rsz/test/CMakeLists.txt

@@ -84,6 +84,7 @@ or_integration_tests(
     repair_hold13
     repair_hold14
     repair_hold15
+    repair_hold_multi_output_load
     repair_setup_sizedown
     repair_setup_sizeup_match
     repair_setup1

src/rsz/test/repair_hold_multi_output_load.def

@@ -0,0 +1,29 @@
+VERSION 5.8 ;
+DIVIDERCHAR "/" ;
+BUSBITCHARS "[]" ;
+DESIGN repair_hold_multi_output_load ;
+UNITS DISTANCE MICRONS 1000 ;
+DIEAREA ( 0 0 ) ( 20000 1000 ) ;
+ROW ROW_0 asap7sc7p5t 0 0 N DO 370 BY 1 STEP 54 0 ;
+COMPONENTS 4 ;
+    - u_capture_con DFFHQNx1_ASAP7_75t_R + PLACED ( 7992 0 ) N ;
+    - u_capture_sn DFFHQNx1_ASAP7_75t_R + PLACED ( 11988 0 ) N ;
+    - u_fa FAx1_ASAP7_75t_R + PLACED ( 3996 0 ) N ;
+    - u_launch DFFHQNx1_ASAP7_75t_R + PLACED ( 1026 0 ) N ;
+END COMPONENTS
+PINS 2 ;
+    - clk + NET clk + DIRECTION INPUT + USE SIGNAL ;
+    - d_in + NET d_in + DIRECTION INPUT + USE SIGNAL ;
+END PINS
+NETS 9 ;
+    - capture_con_qn ( u_capture_con QN ) + USE SIGNAL ;
+    - capture_sn_qn ( u_capture_sn QN ) + USE SIGNAL ;
+    - clk ( PIN clk ) ( u_launch CLK ) ( u_capture_sn CLK ) ( u_capture_con CLK ) + USE SIGNAL ;
+    - con_net ( u_fa CON ) ( u_capture_con D ) + USE SIGNAL ;
+    - d_in ( PIN d_in ) ( u_launch D ) + USE SIGNAL ;
+    - launch_qn ( u_launch QN ) ( u_fa A ) + USE SIGNAL ;
+    - one_ ( u_fa B ) + USE POWER ;
+    - sn_net ( u_fa SN ) ( u_capture_sn D ) + USE SIGNAL ;
+    - zero_ ( u_fa CI ) + USE GROUND ;
+END NETS
+END DESIGN

src/rsz/test/repair_hold_multi_output_load.ok

@@ -0,0 +1,87 @@
+[INFO ODB-0227] LEF file: asap7/asap7_tech_1x_201209.lef, created 30 layers, 9 vias
+[INFO ODB-0227] LEF file: asap7/asap7sc7p5t_28_R_1x_220121a.lef, created 212 library cells
+[INFO ODB-0128] Design: repair_hold_multi_output_load
+[INFO ODB-0130]     Created 2 pins.
+[INFO ODB-0131]     Created 4 components and 22 component-terminals.
+[INFO ODB-0133]     Created 9 nets and 14 connections.
+Startpoint: u_launch (rising edge-triggered flip-flop clocked by clk)
+Endpoint: u_capture_con (rising edge-triggered flip-flop clocked by clk)
+Path Group: clk
+Path Type: min
+
+  Delay    Time   Description
+---------------------------------------------------------
+   0.00    0.00 ^ u_launch/CLK (DFFHQNx1_ASAP7_75t_R)
+  38.23   38.23 ^ u_launch/QN (DFFHQNx1_ASAP7_75t_R)
+  18.85   57.08 v u_fa/CON (FAx1_ASAP7_75t_R)
+   0.14   57.22 v u_capture_con/D (DFFHQNx1_ASAP7_75t_R)
+          57.22   data arrival time
+
+  80.00   80.00   min_delay
+   0.00   80.00   clock reconvergence pessimism
+   5.89   85.89   library hold time
+          85.89   data required time
+---------------------------------------------------------
+          85.89   data required time
+         -57.22   data arrival time
+---------------------------------------------------------
+         -28.67   slack (VIOLATED)
+
+
+Startpoint: u_launch (rising edge-triggered flip-flop clocked by clk)
+Endpoint: u_capture_sn (rising edge-triggered flip-flop clocked by clk)
+Path Group: clk
+Path Type: min
+
+  Delay    Time   Description
+---------------------------------------------------------
+   0.00    0.00 ^ u_launch/CLK (DFFHQNx1_ASAP7_75t_R)
+  37.06   37.06 v u_launch/QN (DFFHQNx1_ASAP7_75t_R)
+  24.47   61.53 ^ u_fa/CON (FAx1_ASAP7_75t_R)
+  20.68   82.21 v u_fa/SN (FAx1_ASAP7_75t_R)
+   0.35   82.56 v u_capture_sn/D (DFFHQNx1_ASAP7_75t_R)
+          82.56   data arrival time
+
+  80.00   80.00   min_delay
+   0.00   80.00   clock reconvergence pessimism
+   5.71   85.71   library hold time
+          85.71   data required time
+---------------------------------------------------------
+          85.71   data required time
+         -82.56   data arrival time
+---------------------------------------------------------
+          -3.16   slack (VIOLATED)
+
+
+[INFO RSZ-0046] Found 2 endpoints with hold violations.
+Iteration | Resized | Buffers | Cloned Gates |   Area   |   WNS   |   TNS   | Endpoint
+--------------------------------------------------------------------------------------
+        0 |       0 |       0 |            0 |    +0.0% | -28.672 | -31.828 | u_capture_con/D
+    final |       0 |       2 |            0 |   +18.9% |  16.822 |   0.000 | u_capture_con/D
+--------------------------------------------------------------------------------------
+[INFO RSZ-0032] Inserted 2 hold buffers.
+Startpoint: u_launch (rising edge-triggered flip-flop clocked by clk)
+Endpoint: u_capture_con (rising edge-triggered flip-flop clocked by clk)
+Path Group: clk
+Path Type: min
+
+  Delay    Time   Description
+---------------------------------------------------------
+   0.00    0.00 ^ u_launch/CLK (DFFHQNx1_ASAP7_75t_R)
+  38.23   38.23 ^ u_launch/QN (DFFHQNx1_ASAP7_75t_R)
+  17.19   55.42 v u_fa/CON (FAx1_ASAP7_75t_R)
+  49.11  104.53 v hold1/Y (HB4xp67_ASAP7_75t_R)
+   0.06  104.59 v u_capture_con/D (DFFHQNx1_ASAP7_75t_R)
+         104.59   data arrival time
+
+  80.00   80.00   min_delay
+   0.00   80.00   clock reconvergence pessimism
+   7.77   87.77   library hold time
+          87.77   data required time
+---------------------------------------------------------
+          87.77   data required time
+        -104.59   data arrival time
+---------------------------------------------------------
+          16.82   slack (MET)
+
+

src/rsz/test/repair_hold_multi_output_load.tcl

@@ -0,0 +1,28 @@
+# Targeted regression for issue #10213. The placed DEF contains one
+# FAx1_ASAP7_75t_R whose CON output drives the repaired endpoint and whose SN
+# output is on a different net. The launch net is marked dont_touch so
+# repair_timing -hold must attempt repair on the FA CON net itself.
+source "helpers.tcl"
+source asap7/asap7.vars
+
+read_liberty asap7/asap7sc7p5t_INVBUF_RVT_FF_nldm_220122.lib.gz
+read_liberty asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz
+read_liberty asap7/asap7sc7p5t_SEQ_RVT_FF_nldm_220123.lib
+read_lef asap7/asap7_tech_1x_201209.lef
+read_lef asap7/asap7sc7p5t_28_R_1x_220121a.lef
+read_def repair_hold_multi_output_load.def
+
+create_clock -name clk -period 10 [get_ports clk]
+set_min_delay 80 -from [get_clocks clk] -to [get_clocks clk]
+
+source asap7/setRC.tcl
+estimate_parasitics -placement
+
+set_dont_touch launch_qn
+
+report_checks -path_delay min -to [get_pins u_capture_con/D]
+report_checks -path_delay min -to [get_pins u_capture_sn/D]
+
+repair_timing -hold -allow_setup_violations
+
+report_checks -path_delay min -to [get_pins u_capture_con/D]