Commit 5508deb
committed
Fix two bugs, add tests, refactor duplicated code:
- `output_verilog_testbench` should not re-initialize RomBlocks. This appears to be an existing bug.
- Consts inputs to bit-slices must be declared.
Add tests for these bugs.
Also move the Verilog export code to a new `class _VerilogOutputter`. This lets
`output_to_verilog` and `output_verilog_testbench` share more code.1 parent c94b341 commit 5508deb
4 files changed
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