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UltrawipfUltrawipf
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F411 HAL update
1 parent 58e89d8 commit 55c784e

33 files changed

Lines changed: 1853 additions & 1335 deletions

‎Firmware/Targets/F411RE/Core/Inc/main.h‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -144,5 +144,3 @@ void MX_USB_OTG_FS_PCD_Init(void);
144144
#endif
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146146
#endif /* __MAIN_H */
147-
148-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎Firmware/Targets/F411RE/Core/Inc/stm32f4xx_hal_conf.h‎

Lines changed: 7 additions & 8 deletions
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@@ -1,3 +1,4 @@
1+
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f4xx_hal_conf_template.h
@@ -8,16 +9,16 @@
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******************************************************************************
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* @attention
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*
11-
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
12-
* All rights reserved.</center></h2>
12+
* Copyright (c) 2017 STMicroelectronics.
13+
* All rights reserved.
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*
14-
* This software component is licensed by ST under BSD 3-Clause license,
15-
* the "License"; You may not use this file except in compliance with the
16-
* License. You may obtain a copy of the License at:
17-
* opensource.org/licenses/BSD-3-Clause
15+
* This software is licensed under terms that can be found in the LICENSE file
16+
* in the root directory of this software component.
17+
* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
2020
*/
21+
/* USER CODE END Header */
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2223
/* Define to prevent recursive inclusion -------------------------------------*/
2324
#ifndef __STM32F4xx_HAL_CONF_H
@@ -488,5 +489,3 @@
488489
#endif
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490491
#endif /* __STM32F4xx_HAL_CONF_H */
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492-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎Firmware/Targets/F411RE/Core/Inc/stm32f4xx_it.h‎

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Original file line numberDiff line numberDiff line change
@@ -78,5 +78,3 @@ void OTG_FS_IRQHandler(void);
7878
#endif
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8080
#endif /* __STM32F4xx_IT_H */
81-
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎Firmware/Targets/F411RE/Core/Src/freertos.c‎

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Original file line numberDiff line numberDiff line change
@@ -70,4 +70,3 @@ void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
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7171
/* USER CODE END Application */
7272

73-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎Firmware/Targets/F411RE/Core/Src/main.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1093,7 +1093,7 @@ __weak void StartDefaultTask(void *argument)
10931093
/* USER CODE END 5 */
10941094
}
10951095

1096-
/**
1096+
/**
10971097
* @brief Period elapsed callback in non blocking mode
10981098
* @note This function is called when TIM11 interrupt took place, inside
10991099
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
@@ -1153,4 +1153,3 @@ void assert_failed(uint8_t *file, uint32_t line)
11531153
}
11541154
#endif /* USE_FULL_ASSERT */
11551155

1156-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎Firmware/Targets/F411RE/Core/Src/stm32f4xx_hal_msp.c‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -868,4 +868,3 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd)
868868

869869
/* USER CODE END 1 */
870870

871-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎Firmware/Targets/F411RE/Core/Src/stm32f4xx_hal_timebase_tim.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
5050

5151
/* Enable the TIM11 global Interrupt */
5252
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
53+
5354
/* Enable TIM11 clock */
5455
__HAL_RCC_TIM11_CLK_ENABLE();
5556

@@ -74,6 +75,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
7475
htim11.Init.Prescaler = uwPrescalerValue;
7576
htim11.Init.ClockDivision = 0;
7677
htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
78+
7779
if(HAL_TIM_Base_Init(&htim11) == HAL_OK)
7880
{
7981
/* Start the TIM time Base generation in interrupt mode */
@@ -108,4 +110,3 @@ void HAL_ResumeTick(void)
108110
__HAL_TIM_ENABLE_IT(&htim11, TIM_IT_UPDATE);
109111
}
110112

111-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎Firmware/Targets/F411RE/Core/Src/stm32f4xx_it.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -181,7 +181,7 @@ void EXTI2_IRQHandler(void)
181181
/* USER CODE BEGIN EXTI2_IRQn 0 */
182182

183183
/* USER CODE END EXTI2_IRQn 0 */
184-
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
184+
HAL_GPIO_EXTI_IRQHandler(AIN3_Pin);
185185
/* USER CODE BEGIN EXTI2_IRQn 1 */
186186

187187
/* USER CODE END EXTI2_IRQn 1 */
@@ -237,8 +237,8 @@ void EXTI9_5_IRQHandler(void)
237237
/* USER CODE BEGIN EXTI9_5_IRQn 0 */
238238

239239
/* USER CODE END EXTI9_5_IRQn 0 */
240-
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
241-
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
240+
HAL_GPIO_EXTI_IRQHandler(FLAG_Pin);
241+
HAL_GPIO_EXTI_IRQHandler(ENCODER_Z_Pin);
242242
/* USER CODE BEGIN EXTI9_5_IRQn 1 */
243243

244244
/* USER CODE END EXTI9_5_IRQn 1 */
@@ -402,4 +402,4 @@ void OTG_FS_IRQHandler(void)
402402
/* USER CODE BEGIN 1 */
403403

404404
/* USER CODE END 1 */
405-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
405+

‎Firmware/Targets/F411RE/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f411xe.h‎

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -817,7 +817,15 @@ typedef struct
817817
/** @addtogroup Exported_constants
818818
* @{
819819
*/
820-
820+
821+
/** @addtogroup Hardware_Constant_Definition
822+
* @{
823+
*/
824+
#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
825+
/**
826+
* @}
827+
*/
828+
821829
/** @addtogroup Peripheral_Registers_Bits_Definition
822830
* @{
823831
*/
@@ -2374,6 +2382,9 @@ typedef struct
23742382
#define FLASH_CR_EOPIE_Pos (24U)
23752383
#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
23762384
#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
2385+
#define FLASH_CR_ERRIE_Pos (25U)
2386+
#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
2387+
#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
23772388
#define FLASH_CR_LOCK_Pos (31U)
23782389
#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
23792390
#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎Firmware/Targets/F411RE/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h‎

Lines changed: 57 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -106,16 +106,16 @@
106106
#endif /* USE_HAL_DRIVER */
107107

108108
/**
109-
* @brief CMSIS version number V2.6.6
109+
* @brief CMSIS version number V2.6.7
110110
*/
111111
#define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */
112112
#define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */
113-
#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x06U) /*!< [15:8] sub2 version */
113+
#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */
114114
#define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
115115
#define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\
116116
|(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\
117117
|(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\
118-
|(__STM32F4xx_CMSIS_VERSION))
118+
|(__STM32F4xx_CMSIS_VERSION_RC))
119119

120120
/**
121121
* @}
@@ -225,6 +225,60 @@ typedef enum
225225

226226
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
227227

228+
/* Use of CMSIS compiler intrinsics for register exclusive access */
229+
/* Atomic 32-bit register access macro to set one or several bits */
230+
#define ATOMIC_SET_BIT(REG, BIT) \
231+
do { \
232+
uint32_t val; \
233+
do { \
234+
val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
235+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
236+
} while(0)
237+
238+
/* Atomic 32-bit register access macro to clear one or several bits */
239+
#define ATOMIC_CLEAR_BIT(REG, BIT) \
240+
do { \
241+
uint32_t val; \
242+
do { \
243+
val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
244+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
245+
} while(0)
246+
247+
/* Atomic 32-bit register access macro to clear and set one or several bits */
248+
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
249+
do { \
250+
uint32_t val; \
251+
do { \
252+
val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
253+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
254+
} while(0)
255+
256+
/* Atomic 16-bit register access macro to set one or several bits */
257+
#define ATOMIC_SETH_BIT(REG, BIT) \
258+
do { \
259+
uint16_t val; \
260+
do { \
261+
val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
262+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
263+
} while(0)
264+
265+
/* Atomic 16-bit register access macro to clear one or several bits */
266+
#define ATOMIC_CLEARH_BIT(REG, BIT) \
267+
do { \
268+
uint16_t val; \
269+
do { \
270+
val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
271+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
272+
} while(0)
273+
274+
/* Atomic 16-bit register access macro to clear and set one or several bits */
275+
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
276+
do { \
277+
uint16_t val; \
278+
do { \
279+
val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
280+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
281+
} while(0)
228282

229283
/**
230284
* @}

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