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Commit 040e30c

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galenbwillgalenbwill
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[powerpc] make register numbers consistent with old capstone-based numbers, fix lifting of FP register operands
1 parent 0262af3 commit 040e30c

4 files changed

Lines changed: 65 additions & 28 deletions

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‎arch/powerpc/arch_ppc.cpp‎

Lines changed: 31 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1556,16 +1556,11 @@ class PowerpcArchitecture: public Architecture
15561556
virtual vector<uint32_t> GetAllRegisters() override
15571557
{
15581558
vector<uint32_t> result = {
1559-
PPC_REG_GPR0, PPC_REG_GPR1, PPC_REG_GPR2, PPC_REG_GPR3,
1560-
PPC_REG_GPR4, PPC_REG_GPR5, PPC_REG_GPR6, PPC_REG_GPR7,
1561-
PPC_REG_GPR8, PPC_REG_GPR9, PPC_REG_GPR10, PPC_REG_GPR11,
1562-
PPC_REG_GPR12, PPC_REG_GPR13, PPC_REG_GPR14, PPC_REG_GPR15,
1563-
PPC_REG_GPR16, PPC_REG_GPR17, PPC_REG_GPR18, PPC_REG_GPR19,
1564-
PPC_REG_GPR20, PPC_REG_GPR21, PPC_REG_GPR22, PPC_REG_GPR23,
1565-
PPC_REG_GPR24, PPC_REG_GPR25, PPC_REG_GPR26, PPC_REG_GPR27,
1566-
PPC_REG_GPR28, PPC_REG_GPR29, PPC_REG_GPR30, PPC_REG_GPR31,
1559+
PPC_REG_CARRY,
1560+
1561+
PPC_REG_CRF0, PPC_REG_CRF1, PPC_REG_CRF2, PPC_REG_CRF3, PPC_REG_CRF4, PPC_REG_CRF5, PPC_REG_CRF6, PPC_REG_CRF7,
15671562

1568-
PPC_REG_XER, PPC_REG_LR, PPC_REG_CTR,
1563+
PPC_REG_CTR,
15691564

15701565
PPC_REG_FR0, PPC_REG_FR1, PPC_REG_FR2, PPC_REG_FR3,
15711566
PPC_REG_FR4, PPC_REG_FR5, PPC_REG_FR6, PPC_REG_FR7,
@@ -1576,8 +1571,28 @@ class PowerpcArchitecture: public Architecture
15761571
PPC_REG_FR24, PPC_REG_FR25, PPC_REG_FR26, PPC_REG_FR27,
15771572
PPC_REG_FR28, PPC_REG_FR29, PPC_REG_FR30, PPC_REG_FR31,
15781573

1579-
PPC_REG_CRF0, PPC_REG_CRF1, PPC_REG_CRF2, PPC_REG_CRF3,
1580-
PPC_REG_CRF4, PPC_REG_CRF5, PPC_REG_CRF6, PPC_REG_CRF7,
1574+
PPC_REG_GPR0, PPC_REG_GPR1, PPC_REG_GPR2, PPC_REG_GPR3,
1575+
PPC_REG_GPR4, PPC_REG_GPR5, PPC_REG_GPR6, PPC_REG_GPR7,
1576+
PPC_REG_GPR8, PPC_REG_GPR9, PPC_REG_GPR10, PPC_REG_GPR11,
1577+
PPC_REG_GPR12, PPC_REG_GPR13, PPC_REG_GPR14, PPC_REG_GPR15,
1578+
PPC_REG_GPR16, PPC_REG_GPR17, PPC_REG_GPR18, PPC_REG_GPR19,
1579+
PPC_REG_GPR20, PPC_REG_GPR21, PPC_REG_GPR22, PPC_REG_GPR23,
1580+
PPC_REG_GPR24, PPC_REG_GPR25, PPC_REG_GPR26, PPC_REG_GPR27,
1581+
PPC_REG_GPR28, PPC_REG_GPR29, PPC_REG_GPR30, PPC_REG_GPR31,
1582+
1583+
PPC_REG_XER, PPC_REG_LR, // PPC_REG_CTR,
1584+
1585+
// PPC_REG_FR0, PPC_REG_FR1, PPC_REG_FR2, PPC_REG_FR3,
1586+
// PPC_REG_FR4, PPC_REG_FR5, PPC_REG_FR6, PPC_REG_FR7,
1587+
// PPC_REG_FR8, PPC_REG_FR9, PPC_REG_FR10, PPC_REG_FR11,
1588+
// PPC_REG_FR12, PPC_REG_FR13, PPC_REG_FR14, PPC_REG_FR15,
1589+
// PPC_REG_FR16, PPC_REG_FR17, PPC_REG_FR18, PPC_REG_FR19,
1590+
// PPC_REG_FR20, PPC_REG_FR21, PPC_REG_FR22, PPC_REG_FR23,
1591+
// PPC_REG_FR24, PPC_REG_FR25, PPC_REG_FR26, PPC_REG_FR27,
1592+
// PPC_REG_FR28, PPC_REG_FR29, PPC_REG_FR30, PPC_REG_FR31,
1593+
1594+
// PPC_REG_CRF0, PPC_REG_CRF1, PPC_REG_CRF2, PPC_REG_CRF3,
1595+
// PPC_REG_CRF4, PPC_REG_CRF5, PPC_REG_CRF6, PPC_REG_CRF7,
15811596

15821597
PPC_REG_AV_VR0, PPC_REG_AV_VR1, PPC_REG_AV_VR2, PPC_REG_AV_VR3,
15831598
PPC_REG_AV_VR4, PPC_REG_AV_VR5, PPC_REG_AV_VR6, PPC_REG_AV_VR7,
@@ -1636,6 +1651,7 @@ class PowerpcArchitecture: public Architecture
16361651
//MYLOG("%s(%s)\n", __func__, PowerPCRegisterName(regId));
16371652

16381653
switch(regId) {
1654+
16391655
case PPC_REG_GPR0: return RegisterInfo(PPC_REG_GPR0, 0, addressSize);
16401656
case PPC_REG_GPR1: return RegisterInfo(PPC_REG_GPR1, 0, addressSize);
16411657
case PPC_REG_GPR2: return RegisterInfo(PPC_REG_GPR2, 0, addressSize);
@@ -1669,9 +1685,13 @@ class PowerpcArchitecture: public Architecture
16691685
case PPC_REG_GPR30: return RegisterInfo(PPC_REG_GPR30, 0, addressSize);
16701686
case PPC_REG_GPR31: return RegisterInfo(PPC_REG_GPR31, 0, addressSize);
16711687

1688+
case PPC_REG_CARRY: return RegisterInfo(PPC_REG_CARRY, 0, 4);
16721689
case PPC_REG_XER: return RegisterInfo(PPC_REG_XER, 0, 4);
16731690
case PPC_REG_LR: return RegisterInfo(PPC_REG_LR, 0, addressSize);
16741691
case PPC_REG_CTR: return RegisterInfo(PPC_REG_CTR, 0, addressSize);
1692+
case PPC_REG_RM: return RegisterInfo(PPC_REG_RM, 0, addressSize);
1693+
case PPC_REG_VRSAVE: return RegisterInfo(PPC_REG_VRSAVE, 0, addressSize);
1694+
case PPC_REG_ZERO: return RegisterInfo(PPC_REG_ZERO, 0, addressSize);
16751695

16761696
case PPC_REG_FR0: return RegisterInfo(PPC_REG_FR0, 0, 4);
16771697
case PPC_REG_FR1: return RegisterInfo(PPC_REG_FR1, 0, 4);

‎arch/powerpc/decode/decode.h‎

Lines changed: 18 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,19 @@ extern "C" {
3535
#endif
3636
enum Register
3737
{
38-
PPC_REG_GPR0,
38+
39+
PPC_REG_INVALID = 0,
40+
41+
PPC_REG_CARRY = 2,
42+
PPC_REG_CTR = 3,
43+
PPC_REG_LR = 5,
44+
PPC_REG_RM = 6,
45+
PPC_REG_VRSAVE = 8,
46+
PPC_REG_XER = 9,
47+
PPC_REG_ZERO = 10,
48+
PPC_REG_CTR8 = 20,
49+
50+
PPC_REG_GPR0 = 87,
3951
PPC_REG_GPR1,
4052
PPC_REG_GPR2,
4153
PPC_REG_GPR3,
@@ -68,11 +80,7 @@ extern "C" {
6880
PPC_REG_GPR30,
6981
PPC_REG_GPR31,
7082

71-
PPC_REG_XER,
72-
PPC_REG_LR,
73-
PPC_REG_CTR,
74-
75-
PPC_REG_FR0,
83+
PPC_REG_FR0 = 21,
7684
PPC_REG_FR1,
7785
PPC_REG_FR2,
7886
PPC_REG_FR3,
@@ -106,7 +114,7 @@ extern "C" {
106114
PPC_REG_FR31,
107115

108116
// each 4-bit CR register
109-
PPC_REG_CRF0,
117+
PPC_REG_CRF0 = 12,
110118
PPC_REG_CRF1,
111119
PPC_REG_CRF2,
112120
PPC_REG_CRF3,
@@ -115,7 +123,7 @@ extern "C" {
115123
PPC_REG_CRF6,
116124
PPC_REG_CRF7,
117125

118-
PPC_REG_AV_VR0,
126+
PPC_REG_AV_VR0 = 121,
119127
PPC_REG_AV_VR1,
120128
PPC_REG_AV_VR2,
121129
PPC_REG_AV_VR3,
@@ -148,7 +156,7 @@ extern "C" {
148156
PPC_REG_AV_VR30,
149157
PPC_REG_AV_VR31,
150158

151-
PPC_REG_VSX_VR0,
159+
PPC_REG_VSX_VR0 = 215,
152160
PPC_REG_VSX_VR1,
153161
PPC_REG_VSX_VR2,
154162
PPC_REG_VSX_VR3,
@@ -213,7 +221,7 @@ extern "C" {
213221
PPC_REG_VSX_VR62,
214222
PPC_REG_VSX_VR63,
215223

216-
PPC_REG_GQR0,
224+
PPC_REG_GQR0 = 345,
217225
PPC_REG_GQR1,
218226
PPC_REG_GQR2,
219227
PPC_REG_GQR3,

‎arch/powerpc/decode/names.c‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,9 @@ const char* PowerPCRegisterName(uint32_t regId)
4040
case PPC_REG_XER: return "xer";
4141
case PPC_REG_LR: return "lr";
4242
case PPC_REG_CTR: return "ctr";
43+
case PPC_REG_CARRY: return "ca";
44+
case PPC_REG_ZERO: return "zero";
45+
case PPC_REG_VRSAVE: return "vrsave";
4346

4447
case PPC_REG_FR0: return "f0";
4548
case PPC_REG_FR1: return "f1";

‎arch/powerpc/il.cpp‎

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,14 @@ static ExprId operToIL(LowLevelILFunction &il, Operand* op,
4141
{
4242
case PPC_OP_REG_RA:
4343
case PPC_OP_REG_RB:
44+
case PPC_OP_REG_RC: // XXX: valid?
4445
case PPC_OP_REG_RD:
4546
case PPC_OP_REG_RS:
47+
case PPC_OP_REG_FRA:
48+
case PPC_OP_REG_FRB:
49+
case PPC_OP_REG_FRC:
50+
case PPC_OP_REG_FRD:
51+
case PPC_OP_REG_FRS:
4652
if (options & OTI_GPR0_ZERO && op->reg == PPC_REG_GPR0)
4753
res = il.Const(regsz, 0);
4854
else
@@ -2092,10 +2098,10 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
20922098

20932099
case PPC_ID_PAIREDSINGLE_PSQ_ST:
20942100
REQUIRE4OPS
2095-
MYLOG("0x%08x psq_st args f%d r%d[%d] w:%lldd gcqr:%lld\n",
2096-
(uint32_t)addr, oper0->reg - PPC_REG_F0, oper1->mem.base - PPC_REG_R0, oper1->mem.disp, oper2->imm,
2097-
oper3->imm);
2098-
MYLOG("opcount %d insn pnem %s\n", ppc->op_count, insn->op_str);
2101+
// MYLOG("0x%08x psq_st args f%d r%d[%d] w:%lldd gcqr:%lld\n",
2102+
// (uint32_t)addr, oper0->reg - PPC_REG_F0, oper1->mem.base - PPC_REG_R0, oper1->mem.disp, oper2->imm,
2103+
// oper3->imm);
2104+
// MYLOG("opcount %d insn pnem %s\n", ppc->op_count, instruction->op_str);
20992105

21002106
// w_l = oper2->imm;
21012107

@@ -2166,9 +2172,9 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
21662172
MYLOG("%s:%s() returning Unimplemented(...) on:\n",
21672173
__FILE__, __func__);
21682174

2169-
MYLOG(" %08llx: %02X %02X %02X %02X %s %s\n",
2170-
addr, data[0], data[1], data[2], data[3],
2171-
res->insn.mnemonic, res->insn.op_str);
2175+
// MYLOG(" %08llx: %02X %02X %02X %02X %s %s\n",
2176+
// addr, data[0], data[1], data[2], data[3],
2177+
// res->insn.mnemonic, res->insn.op_str);
21722178

21732179
il.AddInstruction(il.Unimplemented());
21742180
}

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