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[Rust] WIP Fix riscv i broke and other things
1 parent aca769b commit bc8917a

4 files changed

Lines changed: 24 additions & 37 deletions

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‎arch/riscv/src/lib.rs‎

Lines changed: 12 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1117,29 +1117,26 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
11171117
let rs1 = Register::from(l.rs1());
11181118

11191119
let src_expr = il.add(max_width, rs1, l.imm());
1120-
let load_expr = il.load(size, src_expr)
1121-
.with_source_operand(LowLevelILOperandIndex(1));
1120+
let load_expr = il.load(size, src_expr).build().with_source_operand(LowLevelILOperandIndex(1));
11221121

11231122
match (size < max_width, l.zx()) {
11241123
(false, _) => load_expr,
1125-
(true, true) => il.zx(max_width, load_expr),
1126-
(true, false) => il.sx(max_width, load_expr),
1124+
(true, true) => il.zx(max_width, load_expr).build(),
1125+
(true, false) => il.sx(max_width, load_expr).build(),
11271126
}
11281127
}),
11291128
Op::Store(s) => {
11301129
let size = s.width();
11311130
let dest = il.add(max_width, Register::from(s.rs1()), s.imm());
11321131
let mut src = il
11331132
.expression(Register::from(s.rs2()))
1134-
.with_source_operand(0);
1133+
.with_source_operand(LowLevelILOperandIndex(0));
11351134

11361135
if size < max_width {
11371136
src = il.low_part(size, src).build();
11381137
}
11391138

1140-
il.store(size, dest, src)
1141-
.with_source_operand(LowLevelILOperandIndex(1))
1142-
.append();
1139+
il.store(size, dest, src).build().with_source_operand(LowLevelILOperandIndex(1)).append();
11431140
}
11441141

11451142
Op::AddI(i) => simple_i!(i, |rs1, imm| il.add(max_width, rs1, imm)),
@@ -1461,12 +1458,11 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
14611458

14621459
Op::Lr(a) => simple_op!(a, no_discard {
14631460
let size = a.width();
1464-
let load_expr = il.load(size, Register::from(a.rs1()))
1465-
.with_source_operand(LowLevelILOperandIndex(1));
1461+
let load_expr = il.load(size, Register::from(a.rs1())).build().with_source_operand(LowLevelILOperandIndex(1));
14661462

14671463
match size == max_width {
14681464
true => load_expr,
1469-
false => il.sx(max_width, load_expr),
1465+
false => il.sx(max_width, load_expr).build(),
14701466
}
14711467
}),
14721468
Op::Sc(a) => {
@@ -1499,9 +1495,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
14991495
il.if_expr(cond_expr, &mut t, &mut f).append();
15001496

15011497
il.mark_label(&mut t);
1502-
il.store(size, Register::from(a.rs1()), Register::from(a.rs2()))
1503-
.with_source_operand(LowLevelILOperandIndex(2))
1504-
.append();
1498+
il.store(size, Register::from(a.rs1()), Register::from(a.rs2())).build().with_source_operand(LowLevelILOperandIndex(1)).append();
15051499

15061500
if new_false {
15071501
il.mark_label(&mut f);
@@ -1544,10 +1538,11 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
15441538

15451539
let mut load_expr = il
15461540
.load(size, Register::from(rs1))
1541+
.build()
15471542
.with_source_operand(LowLevelILOperandIndex(2));
15481543

15491544
if size < max_width {
1550-
load_expr = il.sx(max_width, load_expr);
1545+
load_expr = il.sx(max_width, load_expr).build();
15511546
}
15521547

15531548
il.set_reg(max_width, dest_reg, load_expr).append();
@@ -1576,6 +1571,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
15761571

15771572
let load_expr = il
15781573
.load(m.width(), il.add(max_width, rs1, m.imm()))
1574+
.build()
15791575
.with_source_operand(LowLevelILOperandIndex(1));
15801576

15811577
il.set_reg(m.width(), rd, load_expr).append();
@@ -1587,6 +1583,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
15871583
let dest_expr = il.add(max_width, rs1, m.imm());
15881584

15891585
il.store(m.width(), dest_expr, il.reg(m.width(), rs2))
1586+
.build()
15901587
.with_source_operand(LowLevelILOperandIndex(1))
15911588
.append();
15921589
}

‎plugins/warp/src/plugin/create.rs‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,9 @@ use binaryninja::background_task::BackgroundTask;
88
use binaryninja::binary_view::{BinaryView, BinaryViewExt};
99
use binaryninja::command::Command;
1010
use binaryninja::interaction::form::{Form, FormInputField};
11-
use binaryninja::interaction::{show_plaintext_report, MessageBoxButtonResult, MessageBoxButtonSet, MessageBoxIcon};
11+
use binaryninja::interaction::{
12+
show_plaintext_report, MessageBoxButtonResult, MessageBoxButtonSet, MessageBoxIcon,
13+
};
1214
use binaryninja::rc::Ref;
1315
use std::path::PathBuf;
1416
use std::thread;

‎rust/src/low_level_il/lifting.rs‎

Lines changed: 6 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -684,9 +684,9 @@ where
684684
self
685685
}
686686

687-
pub fn with_source_operand(self, op: u32) -> Self {
687+
pub fn with_source_operand(self, op: LowLevelILOperandIndex) -> Self {
688688
use binaryninjacore_sys::BNLowLevelILSetExprSourceOperand;
689-
unsafe { BNLowLevelILSetExprSourceOperand(self.function.handle, self.index.0, op) }
689+
unsafe { BNLowLevelILSetExprSourceOperand(self.function.handle, self.index.0, op.0) }
690690
self
691691
}
692692

@@ -779,20 +779,6 @@ where
779779
self
780780
}
781781

782-
pub fn with_source_operand(mut self, operand: LowLevelILOperandIndex) -> Self {
783-
if let Some(mut location) = self.location {
784-
location.source_operand = Some(operand);
785-
} else {
786-
// TODO: Address 0 here seems incorrect.
787-
// TODO: Seems like some architectures lift an operand at a time? It is very weird...
788-
self.location = Some(LowLevelILSourceLocation {
789-
address: 0,
790-
source_operand: Some(operand),
791-
})
792-
}
793-
self
794-
}
795-
796782
pub fn with_location(mut self, location: LowLevelILSourceLocation) -> Self {
797783
self.location = Some(location);
798784
self
@@ -1402,10 +1388,10 @@ impl LowLevelILMutableFunction {
14021388
};
14031389

14041390
LowLevelILExpressionBuilder::new(self, LLIL_INTRINSIC, 0)
1405-
.with_op1(output_expr_idx as u64)
1406-
.with_op2(intrinsic.id().0 as u64)
1407-
.with_op3(input_expr_idx as u64)
1408-
.with_op4(input_list_expr_idx as u64)
1391+
.with_op1(outputs.len() as u64)
1392+
.with_op2(output_expr_idx as u64)
1393+
.with_op3(intrinsic.id().0 as u64)
1394+
.with_op4(input_expr_idx as u64)
14091395
}
14101396

14111397
sized_unary_op_lifter!(push, LLIL_PUSH, VoidExpr);

‎view/minidump/src/view.rs‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -107,7 +107,9 @@ impl MinidumpBinaryView {
107107

108108
fn init(&self) -> BinaryViewResult<()> {
109109
let parent_view = self.parent_view().ok_or(())?;
110-
let read_buffer = parent_view.read_buffer(0, parent_view.len() as usize).ok_or(())?;
110+
let read_buffer = parent_view
111+
.read_buffer(0, parent_view.len() as usize)
112+
.ok_or(())?;
111113

112114
if let Ok(minidump_obj) = Minidump::read(read_buffer.get_data()) {
113115
// Architecture, platform information

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