Expand ARM and Thumb lifting coverage#8259
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Add LLIL support for a broad set of previously unimplemented or partially implemented ARMv7, Thumb2, VFP, and NEON instructions. Cover system, control, synchronization, hint, and coprocessor operations, including MRS, MSR, VMSR, VMRS, SMC, HVC, CPS/CPSID/CPSIE, CLREX, DMB, DSB, ISB, PLD, SETEND, SRS/RFE, STC/LDC variants, and related intrinsics. Add integer, DSP, saturation, CRC, multiply, and packed arithmetic lifting, including CRC32 variants, QADD/QSUB forms, SSAT/USAT forms, SMMUL/SMMLA, SMLA/SMLAL variants, SXT/UXT variants, REV/RBIT/SEL, packed add/sub variants, UQASX/UQSAX, and Thumb writeback/control-transfer cases. Expand VFP/NEON support for vector moves, arithmetic, comparisons, conversions, shifts, narrowing/widening operations, structured loads/stores, table lookup, reductions, duplicate/reverse/ext operations, and fused multiply forms, wiring new intrinsics and metadata where needed. Extend ARM/Thumb decoder support where required, including CRC32 Thumb variants, and add focused ARM and Thumb lift tests for the new coverage.
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Here's an after/before |
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The two attached binaries (one for ARM and one Thumb) can be used to evaluate the lifting for each instruction (in addition to tests integrated into
lift_check.py).armv7_added_lift_arm.bin.zip
armv7_added_lift_thumb2.bin.zip
Closes #3968
Closes #5527