@@ -1094,6 +1094,8 @@ void loadFloatRegConst(ref CodeBuilder cdb, reg_t vreg, double value, uint sz)
10941094 ubyte imm8;
10951095 if (encodeHFD(value, imm8))
10961096 {
1097+ assert (sz == 2 || sz == 4 || sz == 8 );
1098+ assert (imm8 <= 0xFF );
10971099 uint ftype = INSTR .szToFtype(sz);
10981100 cdb.gen1(INSTR .fmov_float_imm(ftype,imm8,vreg)); // FMOV <Vd>,#<imm8>
10991101 }
@@ -1550,12 +1552,16 @@ void assignaddrc(code* c)
15501552 }
15511553 else if (op24 == 1 )
15521554 {
1555+ // printf("shift: %d opc: %d\n", shift, opc);
1556+ if (opc & 2 && shift == 0 )
1557+ shift = 4 ;
15531558 assert (field(ins,29 ,27 ) == 7 );
15541559 uint imm12 = field(ins,21 ,10 ); // unsigned 12 bits
1560+ // printf("shift: %d offset: x%llx imm12: x%x\n", shift, offset, imm12);
15551561 offset += imm12 << shift; // add in imm
1556- // printf("shift: %d offset: %llx imm12: %x\n", shift, offset, imm12);
15571562 assert ((offset & ((1 << shift) - 1 )) == 0 ); // no misaligned access
15581563 imm12 = cast (uint )(offset >> shift);
1564+ // printf("imm12: x%x\n", imm12);
15591565 assert (imm12 < 0x1000 );
15601566 ins = setField(ins,21 ,10 ,imm12);
15611567 }
0 commit comments