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support 2*REGSIZE in cdmemsetn() (dlang#21559)
1 parent 10a43d2 commit 5c9c708

1 file changed

Lines changed: 7 additions & 3 deletions

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  • compiler/src/dmd/backend/arm

compiler/src/dmd/backend/arm/cod2.d

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1328,8 +1328,6 @@ private void cdmemsetn(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pr
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tym_t tyv = tybasic(evalue.Ety);
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const szv = tysize(tyv);
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assert(cast(int)szv > 1);
1331-
if (tyfloating(tyv))
1332-
assert(0); // TODO AArch64
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regm_t vregs = cgstate.allregs & ~cregs;
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scodelem(cgstate,cdb,evalue,vregs,cregs,false);
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@@ -1396,14 +1394,20 @@ private void cdmemsetn(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pr
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uint opc;
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uint imm3;
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INSTR.szToSizeOpc(szv,imm3,opc); // shift 0..4
1399-
assert(szv != REGSIZE * 2); // TODO AArch64
1397+
if (szv == REGSIZE * 2)
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{
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imm3 = 3;
1400+
opc = 0;
1401+
}
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cdb.gen1(INSTR.addsub_ext(1,op,S,opt,Rc,option,imm3,Rd,Rl));
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if (Rp != Rd)
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genmovreg(cdb,Rp,Rd);
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cdb.gen1(INSTR.ldst_immpost(imm3,0,0,0,Rp,Rv)); // L2: STR Rv,[Rp],#0 // *Rp++ = Rv
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code* L2 = cdb.last();
1409+
if (szv == REGSIZE * 2)
1410+
cdb.gen1(INSTR.ldst_immpost(imm3,0,0,0,Rp,Rvhi)); // L2: STR Rvhi,[Rp],#0 // *Rp++ = Rvhi
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cdb.gen1(INSTR.cmp_shift(1,Rl,0,0,Rp)); // CMP Rp,Rl
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genBranch(cdb,COND.ne,FL.code,cast(block*)L2); // b.ne L2
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cdb.append(c1);

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