Weird behaviour on a Tang Nano 9K

[Ulf-vom-Mond]

Hi there,

first of all, many thanks for this piece of code! I really appreciate the effort and am happy that I don't have to rely on any IP cores.

For my current project, I want the Tang Nano 9K development board to act as a USB audio class device. So I loaded the fpga_top_usb_audio.v example, substituted the Altera PLL for a Gowin one, synthesized and uploaded. However, I couldn't get my Linux to recognize the USB device no matter what. I tried all the stupid things, I tried different USB cables, different FPGA pins, different computers, short cables, long cables, everything but it just wouldn't work. Now, I finally got it to work somehow, but its weird. Thats why I am opening an issue about it. Maybe other people who got it working on Sipeed devboards can share their experiences or people looking for errors in the future will find some guidance here.

So, what did make it work in the end?

wire clk60mhz;
Gowin_rPLL gen60mhz( // generate the 60 MHz clock for the USB library from the onboard 27 MHz crystal oscillator with an IP core
	.clkout(clk60mhz), //output clkout
	.clkin(clk27mhz) //input clkin
);

// the following code has no actual use, but it makes the USB stuff work somehow:
always @(posedge clk27mhz) begin // the sensitivity list can be any signal, for example clk27mhz, clk60mhz or button (coming from the physical reset button)
	toggle <= ~toggle; // toggle is an output pin
end

So, yeah, just adding a random output that toggles sometimes makes the USB library work for me. When not toggling the output but setting it to a static 0 or 1, it doesn't work. When toggling the toggle register, but not assigning it to any physical output pin, it also doesn't work. Does anybody have an idea what could cause this behaviour or how I could make it work in another way? I am not really experienced with FPGAs, I only started out a few weeks ago.

Whats also suspicious is the led which should show whether USB is connected or not. On reset, the pin is 0 but goes to 1 after maybe three seconds without the cable ever plugged into a computer. When I plug the cable in, the led pin goes to 0 for a short amount of time and stays 1 afterwards forever, even if I unplug the cable again.

As for my physical constraints, they look like this:

[SoulCalDan]

Hello, I also used a Tang Nano 9K with this code from Wang Xuan. I am using the official GOWIN program tool. If you look at my repository, I have a game controller working, but it will be the same setup for the GOWIN PLL as your code. You may be able to find something useful.

Your toggle problem I have seen something similar. I have had where I need to set an output to get my FPGA to work. Check if for some reason the 27MHz clock has a warning during synthesis similar to "dropped during optimization" which means the tool ignores it. By creating code that forces the use of the 27MHz clock, you might be forcing synthesis to not ignore the input. Could be that the GOWIN PLL doesn't have the 27MHz input properly assigned.

It could be a lack of declaration of 'wire' on the Tang Nano 9k's 27MHz crystal, and by forcing an output the synthesis assumes you want a wire to carry the clock. Check your top module if the clock is set to "input wire" (like my example).

Odd things I have noticed with using a Tang Nano 9k is some USB 2.0 HUBs do not work with this setup, and only my USB 3.0 HUBs will work with my device, even if Wang Xuan's code is only spec'd to USB 1.1. I need to attempt to use other FPGA boards to see if this issue can be replicated. USB 2.0 HUBs start having strange behavior, like duplicate devices appearing in Windows Device Manager.