Ps2 incremental#38
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Please rebase this. |
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I completely forgot, will do |
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After ae0670b, I added some health components to display status of the controller (rx, timeouts, overruns, parity, etc) every N bytes. Main goal of these changes is the following: make sure the kernel doesn't crash if the controller/a device breaks down. Also the devices should be "plug & play" (I don't think I'll reach this state but is good to try atleast :) ) |
| // Tiny breadcrumb: PS/2 bring-up ran in the chip already. | ||
| debug!("ps/2: controller initialized (chip ran init_early)"); | ||
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| // Now we can safely log via `debug!()` | ||
| debug!("ps/2 health: {}", chip.ps2.health_snapshot()); | ||
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| // Tiny breadcrumb: PS/2 bring-up ran in the chip already. | |
| debug!("ps/2: controller initialized (chip ran init_early)"); | |
| // Now we can safely log via `debug!()` | |
| debug!("ps/2 health: {}", chip.ps2.health_snapshot()); |
| pt: &'a mut PT, | ||
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| /// Holds the PS/2 controller passed in by the board | ||
| ps2: Option<&'a crate::ps2::Ps2Controller>, |
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Is there a reason why this is an Option?
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Leftover from a while ago. Wanted to init. the controller similarly with new().with_ps2(...).finalize(...), and to give an expect() if someone forgets to call with_ps2. But since PS/2 is a hard requirement in PcComponent::new, I'll remove that option.
| /// Depth of the scan-code ring buffer | ||
| const BUFFER_SIZE: usize = 32; | ||
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| /// Timeout limit for spin loops |
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It’s not time-based, it's just a count of polling iterations (how many times we spin reading 0x64 and checking bits). So the "unit" should be spins/loops.
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Please change the code or comment to reflect that, we need to document what this means.
| /// Depth of the scan-code ring buffer | ||
| const BUFFER_SIZE: usize = 32; | ||
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| /// Timeout limit for spin loops |
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Please change the code or comment to reflect that, we need to document what this means.
alexandruradovici
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Let's send it to upstream, make sure to use a better title.
| /// Producer-side enqueue. Safe without masking: on x86_q35, IRQs and | ||
| /// deferred calls are serialized by the main loop (no preemption). | ||
| #[inline(always)] | ||
| fn push_code_atomic(&self, b: u8) { |
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This is not atomic anymore.
step1: PS/2 controller self-test (clock & IRQ still disabled) step2: enable keyboard clock (IRQ 1 still masked) step3: full PS/2 driver – self-test, clock on, IRQ1 unmasked, single-byte buffering step4: drain-loop IRQ handler; full ring-buffer active step5: add send_with_ack() with RESEND retry; enable keyboard scanning (0xF4) step7: implemented some unit tests to debug buffers fix: readded comments from previous controller, moved ps2.init() to enable debug macro feature: added IRQ1 self-test when init.
workflow: rebased with upstream
…for init, reworked ISR to handle drop parity/timeout => make/break logs + prefixes
…lf to keep ISR tny, minor polish
…spin number, removed helper functions
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Pull Request Overview
This pull request adds the i8042 controller over x86/naked_functions branch plus keyboard stubs for the future keyboard driver.
Testing Strategy
This pull request was tested by checking the ring buffer in unit tests + controller debug! macro messages during init. sequence.
TODO or Help Wanted
This pull request needs review
Formatting
make prepush.